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| From: | Richard Henderson |
| Subject: | Re: [Qemu-devel] [RFC v2 PATCH] tcg/softmmu: Increase size of TLB caches |
| Date: | Mon, 28 Aug 2017 13:45:42 -0700 |
| User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 |
On 08/24/2017 08:58 AM, Pranith Kumar wrote: > +#define CPU_TLB_BITS_MAX 12 Following up on our IRC conversation, host maximums are: aarch64: unlimited (32) arm: 8 (patch exists to increase to 32 for armv7) i386: 32 - CPU_TLB_ENTRY_BITS ia64: unlimited (32) mips: 16 - CPU_TLB_ENTRY_BITS ppc: unlimited (32) s390: unlimited (32) sparc: 12 tci: unlimited (32) r~
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