[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v6 28/50] target/hppa: check CF_PARALLEL instead of
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v6 28/50] target/hppa: check CF_PARALLEL instead of parallel_cpus |
Date: |
Mon, 16 Oct 2017 10:25:47 -0700 |
From: "Emilio G. Cota" <address@hidden>
Thereby decoupling the resulting translated code from the current state
of the system.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Emilio G. Cota <address@hidden>
---
target/hppa/helper.h | 2 ++
target/hppa/op_helper.c | 32 ++++++++++++++++++++++++++++----
target/hppa/translate.c | 12 ++++++++++--
3 files changed, 40 insertions(+), 6 deletions(-)
diff --git a/target/hppa/helper.h b/target/hppa/helper.h
index 789f07fc0a..0a6b900555 100644
--- a/target/hppa/helper.h
+++ b/target/hppa/helper.h
@@ -3,7 +3,9 @@ DEF_HELPER_FLAGS_2(tsv, TCG_CALL_NO_WG, void, env, tl)
DEF_HELPER_FLAGS_2(tcond, TCG_CALL_NO_WG, void, env, tl)
DEF_HELPER_FLAGS_3(stby_b, TCG_CALL_NO_WG, void, env, tl, tl)
+DEF_HELPER_FLAGS_3(stby_b_parallel, TCG_CALL_NO_WG, void, env, tl, tl)
DEF_HELPER_FLAGS_3(stby_e, TCG_CALL_NO_WG, void, env, tl, tl)
+DEF_HELPER_FLAGS_3(stby_e_parallel, TCG_CALL_NO_WG, void, env, tl, tl)
DEF_HELPER_FLAGS_1(probe_r, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_1(probe_w, TCG_CALL_NO_RWG_SE, tl, tl)
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index c05c0d5572..3104404e8d 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -76,7 +76,8 @@ static void atomic_store_3(CPUHPPAState *env, target_ulong
addr, uint32_t val,
#endif
}
-void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ulong val)
+static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ulong val,
+ bool parallel)
{
uintptr_t ra = GETPC();
@@ -89,7 +90,7 @@ void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr,
target_ulong val)
break;
case 1:
/* The 3 byte store must appear atomic. */
- if (parallel_cpus) {
+ if (parallel) {
atomic_store_3(env, addr, val, 0x00ffffffu, ra);
} else {
cpu_stb_data_ra(env, addr, val >> 16, ra);
@@ -102,14 +103,26 @@ void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr,
target_ulong val)
}
}
-void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ulong val)
+void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ulong val)
+{
+ do_stby_b(env, addr, val, false);
+}
+
+void HELPER(stby_b_parallel)(CPUHPPAState *env, target_ulong addr,
+ target_ulong val)
+{
+ do_stby_b(env, addr, val, true);
+}
+
+static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ulong val,
+ bool parallel)
{
uintptr_t ra = GETPC();
switch (addr & 3) {
case 3:
/* The 3 byte store must appear atomic. */
- if (parallel_cpus) {
+ if (parallel) {
atomic_store_3(env, addr - 3, val, 0xffffff00u, ra);
} else {
cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
@@ -132,6 +145,17 @@ void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr,
target_ulong val)
}
}
+void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ulong val)
+{
+ do_stby_e(env, addr, val, false);
+}
+
+void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr,
+ target_ulong val)
+{
+ do_stby_e(env, addr, val, true);
+}
+
target_ulong HELPER(probe_r)(target_ulong addr)
{
return page_check_range(addr, 1, PAGE_READ);
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 460b4d3154..08b2c73291 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2291,9 +2291,17 @@ static DisasJumpType trans_stby(DisasContext *ctx,
uint32_t insn,
val = load_gpr(ctx, rt);
if (a) {
- gen_helper_stby_e(cpu_env, addr, val);
+ if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
+ gen_helper_stby_e_parallel(cpu_env, addr, val);
+ } else {
+ gen_helper_stby_e(cpu_env, addr, val);
+ }
} else {
- gen_helper_stby_b(cpu_env, addr, val);
+ if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
+ gen_helper_stby_b_parallel(cpu_env, addr, val);
+ } else {
+ gen_helper_stby_b(cpu_env, addr, val);
+ }
}
if (m) {
--
2.13.6
- [Qemu-devel] [PATCH v6 19/50] target/alpha: Avoid translate_init unless tcg_enabled, (continued)
- [Qemu-devel] [PATCH v6 19/50] target/alpha: Avoid translate_init unless tcg_enabled, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 14/50] tcg: Use per-temp state data in optimize, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 21/50] tcg: Use pointers in TCGOp->args, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 20/50] qom: Introduce CPUClass.tcg_initialize, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 23/50] hack dump tb->flags and tb->cflags, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 24/50] tcg: Add CPUState step_next_tb, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 22/50] tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 25/50] tcg: Include CF_COUNT_MASK in CF_HASH_MASK, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 27/50] target/arm: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 29/50] target/i386: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 28/50] target/hppa: check CF_PARALLEL instead of parallel_cpus,
Richard Henderson <=
- [Qemu-devel] [PATCH v6 26/50] tcg: convert tb->cflags reads to tb_cflags(tb), Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 30/50] target/m68k: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 33/50] target/sparc: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 31/50] target/s390x: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 32/50] target/sh4: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 35/50] cpu-exec: lookup/generate TB outside exclusive region during step_atomic, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 36/50] tcg: Add CF_LAST_IO + CF_USE_ICOUNT to CF_HASH_MASK, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 37/50] tcg: Remove CF_IGNORE_ICOUNT, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 34/50] tcg: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 38/50] translate-all: use a binary search tree to track TBs in TBContext, Richard Henderson, 2017/10/16