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[Qemu-devel] [PATCH 2/8] spapr: introduce a machine class flag to handle
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [PATCH 2/8] spapr: introduce a machine class flag to handle migration compatibility |
Date: |
Sun, 29 Oct 2017 19:12:11 +0100 |
Older pseries machines, before 2.11, do not have a bitmap acting as a
IRQ number allocator but use the ICSIRQState array for this purpose.
This difference between machine versions needs to be taken into
account when loading the state.
To keep in sync the bitmap with the ICSIRQState array flags, we
introduce a machine class flag 'pre_2_11_has_no_bitmap' identifying an
older version.
Signed-off-by: Cédric Le Goater <address@hidden>
---
hw/ppc/spapr.c | 19 +++++++++++++++++++
include/hw/ppc/spapr.h | 1 +
2 files changed, 20 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 88da4bad2328..b33eebe44906 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1532,6 +1532,7 @@ static bool spapr_vga_init(PCIBus *pci_bus, Error **errp)
static int spapr_post_load(void *opaque, int version_id)
{
sPAPRMachineState *spapr = (sPAPRMachineState *)opaque;
+ sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
int err = 0;
if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) {
@@ -1562,6 +1563,20 @@ static int spapr_post_load(void *opaque, int version_id)
}
}
+ /*
+ * synchronize the IRQ number bitmap with the ICSIRQState array
+ * coming from an pre-2.11 pseries machine
+ */
+ if (smc->pre_2_11_has_no_bitmap) {
+ int srcno;
+
+ for (srcno = 0; srcno < spapr->ics->nr_irqs; srcno++) {
+ if (spapr->ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MASK &&
+ !test_bit(srcno, spapr->irq_map)) {
+ bitmap_set(spapr->irq_map, srcno, 1);
+ }
+ }
+ }
return err;
}
@@ -3772,8 +3787,12 @@ static void
spapr_machine_2_10_instance_options(MachineState *machine)
static void spapr_machine_2_10_class_options(MachineClass *mc)
{
+ sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
+
spapr_machine_2_11_class_options(mc);
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_10);
+
+ smc->pre_2_11_has_no_bitmap = true;
}
DEFINE_SPAPR_MACHINE(2_10, "2.10", false);
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index b962bfe09bb5..1525d1518c47 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -62,6 +62,7 @@ struct sPAPRMachineClass {
bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */
bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */
bool pre_2_10_has_unused_icps;
+ bool pre_2_11_has_no_bitmap;
void (*phb_placement)(sPAPRMachineState *spapr, uint32_t index,
uint64_t *buid, hwaddr *pio,
hwaddr *mmio32, hwaddr *mmio64,
--
2.13.6
- [Qemu-devel] [PATCH 0/8] introduce an IRQ allocator at the machine level, Cédric Le Goater, 2017/10/29
- [Qemu-devel] [PATCH 1/8] spapr: introduce an IRQ allocator at the machine level, Cédric Le Goater, 2017/10/29
- [Qemu-devel] [PATCH 2/8] spapr: introduce a machine class flag to handle migration compatibility,
Cédric Le Goater <=
- [Qemu-devel] [PATCH 3/8] pnv: introduce an irq_test() operation, Cédric Le Goater, 2017/10/29
- [Qemu-devel] [PATCH 4/8] spapr: split the IRQ number space for LSI interrupts, Cédric Le Goater, 2017/10/29
- [Qemu-devel] [PATCH 5/8] spapr: introduce an is_lsi() operation, Cédric Le Goater, 2017/10/29
- [Qemu-devel] [PATCH 6/8] sparp: merge ics_set_irq_type() in irq_alloc_block() operation, Cédric Le Goater, 2017/10/29
- [Qemu-devel] [PATCH 7/8] spapr: move spapr_ics_free() under irq_free_block() operation, Cédric Le Goater, 2017/10/29
- [Qemu-devel] [PATCH 8/8] spapr: use sPAPRMachineState in spapr_ics_* prototypes, Cédric Le Goater, 2017/10/29