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Re: [Qemu-devel] [PATCH 07/15] apb: return APBState from pci_apb_init()
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [PATCH 07/15] apb: return APBState from pci_apb_init() rather then PCIBus |
Date: |
Fri, 17 Nov 2017 16:08:25 -0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 |
"rather then PCIBus" -> "rather than PCIBus"
On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
> This is a first step towards removing pci_apb_init() completely.
>
> Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> ---
> hw/pci-host/apb.c | 8 ++++----
> hw/sparc64/sun4u.c | 6 ++++--
> include/hw/pci-host/apb.h | 6 +++---
> 3 files changed, 11 insertions(+), 9 deletions(-)
>
> diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
> index c7837ef..0c70999 100644
> --- a/hw/pci-host/apb.c
> +++ b/hw/pci-host/apb.c
> @@ -612,9 +612,9 @@ static void apb_pci_bridge_realize(PCIDevice *dev, Error
> **errp)
> pci_bridge_update_mappings(PCI_BRIDGE(br));
> }
>
> -PCIBus *pci_apb_init(hwaddr special_base,
> - hwaddr mem_base,
> - qemu_irq *ivec_irqs, PCIBus **busA, PCIBus **busB)
> +APBState *pci_apb_init(hwaddr special_base,
> + hwaddr mem_base,
> + qemu_irq *ivec_irqs, PCIBus **busA, PCIBus **busB)
> {
> DeviceState *dev;
> SysBusDevice *s;
> @@ -675,7 +675,7 @@ PCIBus *pci_apb_init(hwaddr special_base,
> qdev_init_nofail(&pci_dev->qdev);
> *busA = pci_bridge_get_sec_bus(br);
>
> - return phb->bus;
> + return d;
> }
>
> static void pci_pbm_reset(DeviceState *d)
> diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
> index b441f1e..a64ddc5 100644
> --- a/hw/sparc64/sun4u.c
> +++ b/hw/sparc64/sun4u.c
> @@ -482,6 +482,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
> Nvram *nvram;
> unsigned int i;
> uint64_t initrd_addr, initrd_size, kernel_addr, kernel_size,
> kernel_entry;
> + APBState *apb;
> PCIBus *pci_bus, *pci_busA, *pci_busB;
> PCIDevice *ebus, *pci_dev;
> SysBusDevice *s;
> @@ -502,8 +503,9 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
> prom_init(hwdef->prom_addr, bios_name);
>
> ivec_irqs = qemu_allocate_irqs(sparc64_cpu_set_ivec_irq, cpu, IVEC_MAX);
> - pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, ivec_irqs,
> &pci_busA,
> - &pci_busB);
> + apb = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, ivec_irqs, &pci_busA,
> + &pci_busB);
> + pci_bus = PCI_HOST_BRIDGE(apb)->bus;
>
> /* Only in-built Simba PBMs can exist on the root bus, slot 0 on busA is
> reserved (leaving no slots free after on-board devices) however slots
> diff --git a/include/hw/pci-host/apb.h b/include/hw/pci-host/apb.h
> index 35d7d5a..a4ef51a 100644
> --- a/include/hw/pci-host/apb.h
> +++ b/include/hw/pci-host/apb.h
> @@ -89,7 +89,7 @@ typedef struct PBMPCIBridge {
> #define PBM_PCI_BRIDGE(obj) \
> OBJECT_CHECK(PBMPCIBridge, (obj), TYPE_PBM_PCI_BRIDGE)
>
> -PCIBus *pci_apb_init(hwaddr special_base,
> - hwaddr mem_base,
> - qemu_irq *ivec_irqs, PCIBus **bus2, PCIBus **bus3);
> +APBState *pci_apb_init(hwaddr special_base,
> + hwaddr mem_base,
> + qemu_irq *ivec_irqs, PCIBus **bus2, PCIBus **bus3);
> #endif
>
- [Qemu-devel] [PATCH 05/15] sun4u: move initialisation of all ISABus devices into ebus_realize(), (continued)
- [Qemu-devel] [PATCH 06/15] apb: APB QOMify tidy-up, Mark Cave-Ayland, 2017/11/17
- [Qemu-devel] [PATCH 07/15] apb: return APBState from pci_apb_init() rather then PCIBus, Mark Cave-Ayland, 2017/11/17
- Re: [Qemu-devel] [PATCH 07/15] apb: return APBState from pci_apb_init() rather then PCIBus,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [PATCH 08/15] apb: use gpios to wire up the apb device to the SPARC CPU IRQs, Mark Cave-Ayland, 2017/11/17
- [Qemu-devel] [PATCH 09/15] apb: move the two secondary PCI bridges objects into APBState, Mark Cave-Ayland, 2017/11/17
- [Qemu-devel] [PATCH 11/15] apb: split pci_pbm_map_irq() into separate functions for bus A and bus B, Mark Cave-Ayland, 2017/11/17
- [Qemu-devel] [PATCH 12/15] ebus: wire up OBIO interrupts to APB pbm via qdev GPIOs, Mark Cave-Ayland, 2017/11/17