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[Qemu-devel] [PATCHv2 09/15] apb: move the two secondary PCI bridges obj
From: |
Mark Cave-Ayland |
Subject: |
[Qemu-devel] [PATCHv2 09/15] apb: move the two secondary PCI bridges objects into APBState |
Date: |
Sun, 26 Nov 2017 12:34:40 +0000 |
This enables us to remove these parameters from pci_apb_init().
Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Artyom Tarasenko <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
---
hw/pci-host/apb.c | 14 +++++---------
hw/sparc64/sun4u.c | 5 ++++-
include/hw/pci-host/apb.h | 5 +++--
3 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
index c0b97e4..823661a 100644
--- a/hw/pci-host/apb.c
+++ b/hw/pci-host/apb.c
@@ -612,8 +612,7 @@ static void apb_pci_bridge_realize(PCIDevice *dev, Error
**errp)
}
APBState *pci_apb_init(hwaddr special_base,
- hwaddr mem_base,
- PCIBus **busA, PCIBus **busB)
+ hwaddr mem_base)
{
DeviceState *dev;
SysBusDevice *s;
@@ -621,7 +620,6 @@ APBState *pci_apb_init(hwaddr special_base,
APBState *d;
IOMMUState *is;
PCIDevice *pci_dev;
- PCIBridge *br;
/* Ultrasparc PBM main bus */
dev = qdev_create(NULL, TYPE_APB);
@@ -659,18 +657,16 @@ APBState *pci_apb_init(hwaddr special_base,
/* APB secondary busses */
pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 0), true,
TYPE_PBM_PCI_BRIDGE);
- br = PCI_BRIDGE(pci_dev);
- pci_bridge_map_irq(br, "pciB", pci_pbm_map_irq);
+ d->bridgeB = PCI_BRIDGE(pci_dev);
+ pci_bridge_map_irq(d->bridgeB, "pciB", pci_pbm_map_irq);
qdev_init_nofail(&pci_dev->qdev);
- *busB = pci_bridge_get_sec_bus(br);
pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 1), true,
TYPE_PBM_PCI_BRIDGE);
- br = PCI_BRIDGE(pci_dev);
- pci_bridge_map_irq(br, "pciA", pci_pbm_map_irq);
+ d->bridgeA = PCI_BRIDGE(pci_dev);
+ pci_bridge_map_irq(d->bridgeA, "pciA", pci_pbm_map_irq);
qdev_prop_set_bit(DEVICE(pci_dev), "busA", true);
qdev_init_nofail(&pci_dev->qdev);
- *busA = pci_bridge_get_sec_bus(br);
return d;
}
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 2afd3f2..47952be 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -27,6 +27,7 @@
#include "cpu.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
+#include "hw/pci/pci_bridge.h"
#include "hw/pci/pci_bus.h"
#include "hw/pci-host/apb.h"
#include "hw/i386/pc.h"
@@ -501,7 +502,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
prom_init(hwdef->prom_addr, bios_name);
- apb = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, &pci_busA, &pci_busB);
+ apb = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE);
/* Wire up PCI interrupts to CPU */
for (i = 0; i < IVEC_MAX; i++) {
@@ -510,6 +511,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
}
pci_bus = PCI_HOST_BRIDGE(apb)->bus;
+ pci_busA = pci_bridge_get_sec_bus(apb->bridgeA);
+ pci_busB = pci_bridge_get_sec_bus(apb->bridgeB);
/* Only in-built Simba PBMs can exist on the root bus, slot 0 on busA is
reserved (leaving no slots free after on-board devices) however slots
diff --git a/include/hw/pci-host/apb.h b/include/hw/pci-host/apb.h
index f7ead68..ae15d8c 100644
--- a/include/hw/pci-host/apb.h
+++ b/include/hw/pci-host/apb.h
@@ -68,6 +68,8 @@ typedef struct APBState {
MemoryRegion pci_ioport;
uint64_t pci_irq_in;
IOMMUState iommu;
+ PCIBridge *bridgeA;
+ PCIBridge *bridgeB;
uint32_t pci_control[16];
uint32_t pci_irq_map[8];
uint32_t pci_err_irq_map[4];
@@ -92,6 +94,5 @@ typedef struct PBMPCIBridge {
OBJECT_CHECK(PBMPCIBridge, (obj), TYPE_PBM_PCI_BRIDGE)
APBState *pci_apb_init(hwaddr special_base,
- hwaddr mem_base,
- PCIBus **bus2, PCIBus **bus3);
+ hwaddr mem_base);
#endif
--
1.7.10.4
- [Qemu-devel] [PATCHv2 00/15] sun4u: tidy-up CPU, APB and ebus, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 02/15] sun4u: ebus QOMify tidy-up, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 04/15] sun4u: remove pci_ebus_init() function, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 05/15] sun4u: move initialisation of all ISABus devices into ebus_realize(), Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 07/15] apb: return APBState from pci_apb_init() rather than PCIBus, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 01/15] apb: move QOM macros and typedefs from apb.c to apb.h, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 08/15] apb: use gpios to wire up the apb device to the SPARC CPU IRQs, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 03/15] sun4u: move ISABus inside of EBusState, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 09/15] apb: move the two secondary PCI bridges objects into APBState,
Mark Cave-Ayland <=
- [Qemu-devel] [PATCHv2 06/15] apb: APB QOMify tidy-up, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 11/15] apb: split pci_pbm_map_irq() into separate functions for bus A and bus B, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 13/15] apb: replace OBIO interrupt numbers in pci_pbmA_map_irq() with constants, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 14/15] sparc64: introduce trace-events for hw/sparc64, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 15/15] sun4u: switch from EBUS_DPRINTF() macro to trace-events, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 10/15] apb: remove pci_apb_init() and instantiate APB device using qdev, Mark Cave-Ayland, 2017/11/26
- [Qemu-devel] [PATCHv2 12/15] ebus: wire up OBIO interrupts to APB pbm via qdev GPIOs, Mark Cave-Ayland, 2017/11/26