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[Qemu-devel] MTTCG and atomicity of loads and stores from QEMU C helper


From: Peter Maydell
Subject: [Qemu-devel] MTTCG and atomicity of loads and stores from QEMU C helper functions
Date: Fri, 15 Dec 2017 18:14:43 +0000

We have a fair amount of code in QEMU which is helper functions
written in C which make guest memory accesses -- the most common
case being page table walk code.

Generally in CPU architectures the accesses by things like the
page table walker have some atomicity guarantees. For instance
Arm requires that reads of translation tables are single-copy-atomic
(v8A Arm ARM rev B.a section B2.2.1). If we supported the
hardware management of the Access flag (we don't currently) that
wolud have to be an atomic read-modify-write of the descriptor
memory (section D4.4.9).

What's the right API in QEMU to do these guest memory accesses with
the required atomicity guarantees? Currently target/arm uses
address_space_ldq_le(), which turns into a ldq_he_p(), which is
a memcpy(), which I don't think is guaranteed to be a 64-bit load.
And I don't think we have an accessor function for doing an atomic
read-modify-write, do we?

[I think one of the PPC maintainers first brought this issue up on
IRC some while back, but I'm afraid I can't remember who that was.]

thanks
-- PMM



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