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Re: [Qemu-devel] [PATCH v2 06/20] include/fpu/softfloat: add some float1
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [PATCH v2 06/20] include/fpu/softfloat: add some float16 constants |
Date: |
Tue, 9 Jan 2018 10:27:46 -0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 |
Hi Alex,
On 01/09/2018 09:22 AM, Alex Bennée wrote:
> This defines the same set of common constants for float 16 as defined
> for 32 and 64 bit floats. These are often used by target helper
> functions. I've also removed constants that are not used by anybody.
>
> Signed-off-by: Alex Bennée <address@hidden>
>
> ---
> v2
> - fixup constants, remove unused onces
> ---
> include/fpu/softfloat.h | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
> index 8ab5d0df47..e64bf62f3d 100644
> --- a/include/fpu/softfloat.h
> +++ b/include/fpu/softfloat.h
> @@ -368,6 +368,11 @@ static inline float16 float16_set_sign(float16 a, int
> sign)
> return make_float16((float16_val(a) & 0x7fff) | (sign << 15));
> }
>
> +#define float16_zero make_float16(0)
> +#define float16_one make_float16(0x3a00)
I still disagree with this one, it seems your bits 9/10 are inverted
(mantissa msb with biased exponent lsb).
S EEEEE TTTTTTTTTT
0x3a00 = 0 01110 1000000000
having:
S=0
E=0b01110=14
T=0b1000000000=512
I get:
(-1)^0 * 2^(14-15) * (1 + (2^-10) * 512) = 1 * 0.5 * (1 + 0.5) = 0.75
With 0x3c00 I get:
S EEEEE TTTTTTTTTT
0x3c00 = 0 01111 0000000000
S=0
E=0b01111=15
T=0b0000000000=0
(-1)^0 * 2^(15-15) * (1 + (2^-10) * 0) = 1 * 2^0 * (1 + 0) = 1
The rest is OK.
Changing by "#define float16_one make_float16(0x3c00)":
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> +#define float16_half make_float16(0x3800)
> +#define float16_infinity make_float16(0x7c00)
> +
>
> /*----------------------------------------------------------------------------
> | The pattern for a default generated half-precision NaN.
>
> *----------------------------------------------------------------------------*/
> @@ -474,8 +479,6 @@ static inline float32 float32_set_sign(float32 a, int
> sign)
>
> #define float32_zero make_float32(0)
> #define float32_one make_float32(0x3f800000)
> -#define float32_ln2 make_float32(0x3f317218)
> -#define float32_pi make_float32(0x40490fdb)
> #define float32_half make_float32(0x3f000000)
> #define float32_infinity make_float32(0x7f800000)
>
> @@ -588,7 +591,6 @@ static inline float64 float64_set_sign(float64 a, int
> sign)
> #define float64_zero make_float64(0)
> #define float64_one make_float64(0x3ff0000000000000LL)
> #define float64_ln2 make_float64(0x3fe62e42fefa39efLL)
> -#define float64_pi make_float64(0x400921fb54442d18LL)
> #define float64_half make_float64(0x3fe0000000000000LL)
> #define float64_infinity make_float64(0x7ff0000000000000LL)
>
>
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[Qemu-devel] [PATCH v2 05/20] include/fpu/softfloat: implement float16_set_sign helper, Alex Bennée, 2018/01/09
[Qemu-devel] [PATCH v2 03/20] include/fpu/softfloat: implement float16_abs helper, Alex Bennée, 2018/01/09
[Qemu-devel] [PATCH v2 06/20] include/fpu/softfloat: add some float16 constants, Alex Bennée, 2018/01/09
[Qemu-devel] [PATCH v2 04/20] include/fpu/softfloat: implement float16_chs helper, Alex Bennée, 2018/01/09
[Qemu-devel] [PATCH v2 01/20] fpu/softfloat: implement float16_squash_input_denormal, Alex Bennée, 2018/01/09
[Qemu-devel] [PATCH v2 08/20] fpu/softfloat: improve comments on ARM NaN propagation, Alex Bennée, 2018/01/09
[Qemu-devel] [PATCH v2 09/20] fpu/softfloat: move the extract functions to the top of the file, Alex Bennée, 2018/01/09