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Re: [Qemu-devel] [PATCH v1 for-2-12 05/15] s390x/tcg: simplify machine c


From: Cornelia Huck
Subject: Re: [Qemu-devel] [PATCH v1 for-2-12 05/15] s390x/tcg: simplify machine check handling
Date: Tue, 9 Jan 2018 17:31:37 +0100

On Mon, 11 Dec 2017 14:47:30 +0100
David Hildenbrand <address@hidden> wrote:

> We currently only support CRW machine checks. This is a preparation for
> real floating interrupt support.
> 
> Get rid of the queue and handle it via the bit INTERRUPT_MCHK. We don't
> rename it for now, as it will be soon gone (when moving crw machine checks
> into the flic).
> 
> Please note that this is the same way also KVM handles it: only one
> instance of a machine check can be pending at a time. So no need for a
> queue.

That's basically architecture (IIRC, it's been a while). More pending
machine checks are handled by merging into the mcic.

> 
> While at it, make sure we try to deliver only if env->cregs[14]
> actually indicates that CRWs are accepted.
> 
> Drop two unused defines on the way (we already have PSW_MASK_...).
> 
> Signed-off-by: David Hildenbrand <address@hidden>
> ---
>  target/s390x/cpu.c         |  2 --
>  target/s390x/cpu.h         | 10 ----------
>  target/s390x/excp_helper.c | 29 +++++------------------------
>  target/s390x/interrupt.c   | 18 +++++++-----------
>  4 files changed, 12 insertions(+), 47 deletions(-)



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