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[Qemu-devel] [PATCH v7 12/16] sdhci: Fix 64-bit ADMA2
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-devel] [PATCH v7 12/16] sdhci: Fix 64-bit ADMA2 |
Date: |
Thu, 18 Jan 2018 09:32:14 -0300 |
From: Sai Pavan Boddu <address@hidden>
The 64-bit ADMA address is not converted to the cpu endianes correctly.
This patch fixes the issue and uses a valid mask for the attribute data.
Signed-off-by: Sai Pavan Boddu <address@hidden>
[AF: Re-write commit message]
Reviewed-by: Alistair Francis <address@hidden>
---
hw/sd/sdhci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index a8663979c5..aff914009b 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -632,8 +632,8 @@ static void get_adma_description(SDHCIState *s, ADMADescr
*dscr)
dscr->length = le16_to_cpu(dscr->length);
dma_memory_read(s->dma_as, entry_addr + 4,
(uint8_t *)(&dscr->addr), 8);
- dscr->attr = le64_to_cpu(dscr->attr);
- dscr->attr &= 0xfffffff8;
+ dscr->addr = le64_to_cpu(dscr->addr);
+ dscr->attr &= (uint8_t) ~0xC0;
dscr->incr = 12;
break;
}
--
2.15.1
- [Qemu-devel] [PATCH v7 06/16] sdhci: add init_readonly_registers() to initialize the CAPAB register, (continued)
[Qemu-devel] [PATCH v7 08/16] sdhci: add basic Spec v1 capabilities, Philippe Mathieu-Daudé, 2018/01/18
[Qemu-devel] [PATCH v7 09/16] sdhci: add max-block-length capability (Spec v1), Philippe Mathieu-Daudé, 2018/01/18
[Qemu-devel] [PATCH v7 12/16] sdhci: Fix 64-bit ADMA2,
Philippe Mathieu-Daudé <=
[Qemu-devel] [PATCH v7 14/16] hw/arm/xilinx_zynq: implement SDHCI Spec v2, Philippe Mathieu-Daudé, 2018/01/18
[Qemu-devel] [PATCH v7 15/16] hw/arm/exynos4210: implement SDHCI Spec v2, Philippe Mathieu-Daudé, 2018/01/18
[Qemu-devel] [PATCH v7 16/16] sdhci: throw an error if capabilities are incorrectly configured, Philippe Mathieu-Daudé, 2018/01/18