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[Qemu-devel] [PATCH 02/10] cuda: don't allow writes to port output pins
From: |
Mark Cave-Ayland |
Subject: |
[Qemu-devel] [PATCH 02/10] cuda: don't allow writes to port output pins |
Date: |
Sat, 3 Feb 2018 10:37:19 +0000 |
Use the direction registers as a mask to ensure that only input pins are
updated upon write.
Signed-off-by: Mark Cave-Ayland <address@hidden>
---
hw/misc/macio/cuda.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 23b7e0f5b0..7214e7adcb 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -359,11 +359,11 @@ static void cuda_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
switch(addr) {
case CUDA_REG_B:
- s->b = val;
+ s->b = (s->b & ~s->dirb) | (val & s->dirb);
cuda_update(s);
break;
case CUDA_REG_A:
- s->a = val;
+ s->a = (s->a & ~s->dira) | (val & s->dira);
break;
case CUDA_REG_DIRB:
s->dirb = val;
--
2.11.0
- [Qemu-devel] [PATCH 00/10] cuda: various fixes, and move 6522 to separate device, Mark Cave-Ayland, 2018/02/03
- [Qemu-devel] [PATCH 03/10] cuda: don't call cuda_update() when writing to ACR register, Mark Cave-Ayland, 2018/02/03
- [Qemu-devel] [PATCH 07/10] cuda: set timer 1 frequency property to CUDA_TIMER_FREQ, Mark Cave-Ayland, 2018/02/03
- [Qemu-devel] [PATCH 01/10] cuda: do not use old_mmio accesses, Mark Cave-Ayland, 2018/02/03
- [Qemu-devel] [PATCH 02/10] cuda: don't allow writes to port output pins,
Mark Cave-Ayland <=
- [Qemu-devel] [PATCH 08/10] cuda: factor out timebase-derived counter value and load time, Mark Cave-Ayland, 2018/02/03
- [Qemu-devel] [PATCH 04/10] cuda: introduce CUDAState parameter to get_counter(), Mark Cave-Ayland, 2018/02/03
- [Qemu-devel] [PATCH 06/10] cuda: minor cosmetic tidy-ups to get_next_irq_time(), Mark Cave-Ayland, 2018/02/03
- [Qemu-devel] [PATCH 05/10] cuda: rename frequency property to tb_frequency, Mark Cave-Ayland, 2018/02/03