[Qemu-devel] [PULL 29/30] target/arm/translate.c: Fix missing 'break' for TT insns

[Peter Maydell]

The code where we added the TT instruction was accidentally
missing a 'break', which meant that after generating the code
to execute the TT we would fall through to 'goto illegal_op'
and generate code to take an UNDEF insn.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
---
 target/arm/translate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/arm/translate.c b/target/arm/translate.c
index a8c13d3758..1270022289 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9925,6 +9925,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t 
insn)
                         tcg_temp_free_i32(addr);
                         tcg_temp_free_i32(op);
                         store_reg(s, rd, ttresp);
+                        break;
                     }
                     goto illegal_op;
                 }
-- 
2.16.1