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[Qemu-devel] [PULL 06/42] hw/i2c-ddc: Do not fail writes
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 06/42] hw/i2c-ddc: Do not fail writes |
Date: |
Thu, 1 Mar 2018 11:23:27 +0000 |
From: Linus Walleij <address@hidden>
The tx function of the DDC I2C slave emulation was returning 1
on all writes resulting in NACK in the I2C bus. Changing it to
0 makes the DDC I2C work fine with bit-banged I2C such as the
versatile I2C.
I guess it was not affecting whatever I2C controller this was
used with until now, but with the Versatile I2C it surely
does not work.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Linus Walleij <address@hidden>
Message-id: address@hidden
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/i2c/i2c-ddc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i2c/i2c-ddc.c b/hw/i2c/i2c-ddc.c
index 199dac9e41..bec0c91e2d 100644
--- a/hw/i2c/i2c-ddc.c
+++ b/hw/i2c/i2c-ddc.c
@@ -259,12 +259,12 @@ static int i2c_ddc_tx(I2CSlave *i2c, uint8_t data)
s->reg = data;
s->firstbyte = false;
DPRINTF("[EDID] Written new pointer: %u\n", data);
- return 1;
+ return 0;
}
/* Ignore all writes */
s->reg++;
- return 1;
+ return 0;
}
static void i2c_ddc_init(Object *obj)
--
2.16.2
- [Qemu-devel] [PULL 12/42] target/arm/cpu.h: add additional float_status flags, (continued)
- [Qemu-devel] [PULL 12/42] target/arm/cpu.h: add additional float_status flags, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 10/42] target/arm/cpu64: introduce ARM_V8_FP16 feature bit, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 04/42] i2c: Fix some brace style issues, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 14/42] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV), Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 07/42] hw/sii9022: Add support for Silicon Image SII9022, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 16/42] arm/translate-a64: initial decode for simd_three_reg_same_fp16, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 18/42] arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 20/42] arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 09/42] include/exec/helper-head.h: support f16 in helper calls, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 08/42] arm/vexpress: Add proper display connector emulation, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 06/42] hw/i2c-ddc: Do not fail writes,
Peter Maydell <=
- [Qemu-devel] [PULL 05/42] i2c: Move the bus class to i2c.h, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 03/42] xilinx_spips: Use 8 dummy cycles with the QIOR/QIOR4 commands, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 02/42] xilinx_spips: Enable only two slaves when reading/writing with stripe, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 17/42] arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 13/42] target/arm/helper: pass explicit fpst to set_rmode, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 21/42] arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 24/42] arm/translate-a64: initial decode for simd_two_reg_misc_fp16, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 22/42] arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 25/42] arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16, Peter Maydell, 2018/03/01
- [Qemu-devel] [PULL 26/42] arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16, Peter Maydell, 2018/03/01