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Re: [Qemu-devel] [PATCH v2 15/23] RISC-V: Use memory_region_is_ram in pt
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [PATCH v2 15/23] RISC-V: Use memory_region_is_ram in pte update |
Date: |
Sat, 10 Mar 2018 21:42:22 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 |
On 03/09/2018 05:12 AM, Michael Clark wrote:
> After reading cpu_physical_memory_write and friends, it seems
> that memory_region_is_ram is a more appropriate interface,
> and matches the intent of the code that is calling it.
>
> Cc: Sagar Karandikar <address@hidden>
> Cc: Bastian Koppelmann <address@hidden>
> Signed-off-by: Michael Clark <address@hidden>
> Signed-off-by: Palmer Dabbelt <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> ---
> target/riscv/helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/helper.c b/target/riscv/helper.c
> index 162d5ec..fc550d3 100644
> --- a/target/riscv/helper.c
> +++ b/target/riscv/helper.c
> @@ -235,7 +235,7 @@ restart:
> rcu_read_lock();
> mr = address_space_translate(cs->as, pte_addr,
> &addr1, &l, false);
> - if (memory_access_is_direct(mr, true)) {
> + if (memory_region_is_ram(mr)) {
> target_ulong *pte_pa =
> qemu_map_ram_ptr(mr->ram_block, addr1);
> #if TCG_OVERSIZED_GUEST
>
- Re: [Qemu-devel] [PATCH v2 10/23] RISC-V: Hold rcu_read_lock when accessing memory, (continued)
- [Qemu-devel] [PATCH v2 11/23] RISC-V: Improve page table walker spec compliance, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 12/23] RISC-V: Update E order and I extension order, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 14/23] RISC-V: Make virt header comment title consistent, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 13/23] RISC-V: Make some header guards more specific, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 16/23] RISC-V: Remove EM_RISCV ELF_MACHINE indirection, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 15/23] RISC-V: Use memory_region_is_ram in pte update, Michael Clark, 2018/03/08
- Re: [Qemu-devel] [PATCH v2 15/23] RISC-V: Use memory_region_is_ram in pte update,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [PATCH v2 17/23] RISC-V: Hardwire satp to 0 for no-mmu case, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 18/23] RISC-V: Remove braces from satp case statement, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 19/23] RISC-V: riscv-qemu port supports sv39 and sv48, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 20/23] RISC-V: vectored traps are optional, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 21/23] RISC-V: No traps on writes to misa, minstret, mcycle, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 22/23] RISC-V: Remove support for adhoc X_COP interrupt, Michael Clark, 2018/03/08
- [Qemu-devel] [PATCH v2 23/23] RISC-V: Convert cpu definition towards future model, Michael Clark, 2018/03/08
- Re: [Qemu-devel] [PATCH v2 00/23] RISC-V Post-merge spec conformance and cleanup, no-reply, 2018/03/12