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[Qemu-devel] [PULL 12/19] target/arm: Fix bitmask for PMCCFILTR writes
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 12/19] target/arm: Fix bitmask for PMCCFILTR writes |
Date: |
Thu, 26 Apr 2018 11:47:08 +0100 |
From: Aaron Lindsay <address@hidden>
It was shifted to the left one bit too few.
Signed-off-by: Aaron Lindsay <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 81e88f255b..85c289f3b9 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -1119,7 +1119,7 @@ static void pmccfiltr_write(CPUARMState *env, const
ARMCPRegInfo *ri,
uint64_t value)
{
pmccntr_sync(env);
- env->cp15.pmccfiltr_el0 = value & 0x7E000000;
+ env->cp15.pmccfiltr_el0 = value & 0xfc000000;
pmccntr_sync(env);
}
--
2.17.0
- [Qemu-devel] [PULL 00/19] target-arm queue, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 07/19] target/arm: Mask PMU register writes based on PMCR_EL0.N, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 12/19] target/arm: Fix bitmask for PMCCFILTR writes,
Peter Maydell <=
- [Qemu-devel] [PULL 10/19] target/arm: Add pre-EL change hooks, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 11/19] target/arm: Allow EL change hooks to do IO, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 06/19] target/arm: Treat PMCCNTR as alias of PMCCNTR_EL0, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 14/19] hw/arm/raspi: Don't bother setting default_cpu_type, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 09/19] target/arm: Support multiple EL change hooks, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 13/19] target/arm: Make PMOVSCLR and PMUSERENR 64 bits wide, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 04/19] target/arm: Use v7m_stack_read() for reading the frame signature, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 15/19] hw/arm/highbank: don't make sysram 'nomigrate', Peter Maydell, 2018/04/26