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Re: [Qemu-devel] [PATCH] x86/cpu: Enable CLDEMOTE(Demote Cache Line) cpu
From: |
Liu, Jingqi |
Subject: |
Re: [Qemu-devel] [PATCH] x86/cpu: Enable CLDEMOTE(Demote Cache Line) cpu feature |
Date: |
Thu, 3 May 2018 05:42:28 +0000 |
Yes. The corresponding patch in KVM refers to the following link:
https://www.spinics.net/lists/kernel/msg2792864.html
Thanks.
-----Original Message-----
From: Eduardo Habkost [mailto:address@hidden
Sent: Thursday, May 3, 2018 11:05 AM
To: Liu, Jingqi <address@hidden>
Cc: address@hidden; address@hidden; address@hidden
Subject: Re: [PATCH] x86/cpu: Enable CLDEMOTE(Demote Cache Line) cpu feature
On Fri, May 04, 2018 at 11:57:33AM +0800, Jingqi Liu wrote:
> The CLDEMOTE instruction hints to hardware that the cache line that
> contains the linear address should be moved("demoted") from the
> cache(s) closest to the processor core to a level more distant from
> the processor core. This may accelerate subsequent accesses to the
> line by other cores in the same coherence domain, especially if the
> line was written by the core that demotes the line.
>
> Intel Snow Ridge has added new cpu feature, CLDEMOTE.
> The new cpu feature needs to be exposed to guest VM.
>
> The bit definition:
> CPUID.(EAX=7,ECX=0):ECX[bit 25] CLDEMOTE
>
> The release document ref below link:
> https://software.intel.com/sites/default/files/managed/c5/15/\
> architecture-instruction-set-extensions-programming-reference.pdf
>
> Signed-off-by: Jingqi Liu <address@hidden>
Thanks. Do you have a pointer to the corresponding GET_SUPPORTED_CPUID patch
in KVM?
--
Eduardo