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From: | Alex Bennée |
Subject: | Re: [Qemu-devel] [PATCH v2 2/3] fpu/softfloat: support ARM Alternative half-precision |
Date: | Fri, 04 May 2018 13:26:09 +0100 |
User-agent: | mu4e 1.1.0; emacs 26.1 |
Richard Henderson <address@hidden> writes: > On 05/03/2018 11:17 AM, Peter Maydell wrote: >> (target/i386 notably does not do this, we should check how >> SSE and x87 handle NaNs in fp conversions first.) > > Hardware does silence NaNs. I tested that earlier: > > https://lists.gnu.org/archive/html/qemu-devel/2018-04/msg03114.html Does that include SSE? I know the hardware will silence NaN's if the value is ever pushed into an x87 register (as GCC will do when spilling/filling float). > > > r~ -- Alex Bennée
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