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[Qemu-devel] [PULL 09/13] target/openrisc: Convert dec_M
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 09/13] target/openrisc: Convert dec_M |
Date: |
Thu, 10 May 2018 21:23:20 -0700 |
Acked-by: Stafford Horne <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/openrisc/translate.c | 41 ++++++++++++------------------------
target/openrisc/insns.decode | 3 +++
2 files changed, 16 insertions(+), 28 deletions(-)
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
index f2f9a0c0d2..548e0230b3 100644
--- a/target/openrisc/translate.c
+++ b/target/openrisc/translate.c
@@ -1031,32 +1031,21 @@ static bool trans_l_rori(DisasContext *dc, arg_dal *a,
uint32_t insn)
return true;
}
-static void dec_M(DisasContext *dc, uint32_t insn)
+static bool trans_l_movhi(DisasContext *dc, arg_l_movhi *a, uint32_t insn)
{
- uint32_t op0;
- uint32_t rd;
- uint32_t K16;
- op0 = extract32(insn, 16, 1);
- rd = extract32(insn, 21, 5);
- K16 = extract32(insn, 0, 16);
+ LOG_DIS("l.movhi r%d, %d\n", a->d, a->k);
+ check_r0_write(a->d);
+ tcg_gen_movi_tl(cpu_R[a->d], a->k << 16);
+ return true;
+}
- check_r0_write(rd);
- switch (op0) {
- case 0x0: /* l.movhi */
- LOG_DIS("l.movhi r%d, %d\n", rd, K16);
- tcg_gen_movi_tl(cpu_R[rd], (K16 << 16));
- break;
-
- case 0x1: /* l.macrc */
- LOG_DIS("l.macrc r%d\n", rd);
- tcg_gen_trunc_i64_tl(cpu_R[rd], cpu_mac);
- tcg_gen_movi_i64(cpu_mac, 0);
- break;
-
- default:
- gen_illegal_exception(dc);
- break;
- }
+static bool trans_l_macrc(DisasContext *dc, arg_l_macrc *a, uint32_t insn)
+{
+ LOG_DIS("l.macrc r%d\n", a->d);
+ check_r0_write(a->d);
+ tcg_gen_trunc_i64_tl(cpu_R[a->d], cpu_mac);
+ tcg_gen_movi_i64(cpu_mac, 0);
+ return true;
}
static void dec_comp(DisasContext *dc, uint32_t insn)
@@ -1481,10 +1470,6 @@ static void disas_openrisc_insn(DisasContext *dc,
OpenRISCCPU *cpu)
op0 = extract32(insn, 26, 6);
switch (op0) {
- case 0x06:
- dec_M(dc, insn);
- break;
-
case 0x2f:
dec_compi(dc, insn);
break;
diff --git a/target/openrisc/insns.decode b/target/openrisc/insns.decode
index fb8ba5812a..84f71c13b3 100644
--- a/target/openrisc/insns.decode
+++ b/target/openrisc/insns.decode
@@ -95,6 +95,9 @@ l_mtspr 110000 ..... a:5 b:5 ...........
k=%mtspr_k
l_maci 010011 ----- a:5 i:s16
+l_movhi 000110 d:5 ----0 k:16
+l_macrc 000110 d:5 ----1 00000000 00000000
+
####
# Arithmetic Instructions
####
--
2.17.0
- [Qemu-devel] [PULL 00/13] openrisc: Covert to decodetree.py, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 02/13] target/openrisc: Start conversion to decodetree.py, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 03/13] target/openrisc: Convert branch insns, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 01/13] target-openrisc: Write back result before FPE exception, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 04/13] target/openrisc: Convert memory insns, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 05/13] target/openrisc: Convert remainder of dec_misc insns, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 06/13] target/openrisc: Convert dec_calc, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 07/13] target/openrisc: Convert dec_mac, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 09/13] target/openrisc: Convert dec_M,
Richard Henderson <=
- [Qemu-devel] [PULL 08/13] target/openrisc: Convert dec_logic, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 10/13] target/openrisc: Convert dec_comp, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 11/13] target/openrisc: Convert dec_compi, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 12/13] target/openrisc: Convert dec_float, Richard Henderson, 2018/05/11
- [Qemu-devel] [PULL 13/13] target/openrisc: Merge disas_openrisc_insn, Richard Henderson, 2018/05/11
- Re: [Qemu-devel] [PULL 00/13] openrisc: Covert to decodetree.py, Peter Maydell, 2018/05/14