Re: [Qemu-devel] [PULL v1 27/38] target-microblaze: mmu: Add a configurable output address mask

[Edgar Iglesias]

Hi,

Sorry for top post. This was my fuck up. The second assignment should go away. 
I'll send out a fix later.

Thanks,
Edgar


---
Sent from my phone


-------- Original Message --------
Subject: Re: [PULL v1 27/38] target-microblaze: mmu: Add a configurable output 
address mask
From: Peter Maydell <address@hidden>
Date: Jun 4, 2018, 20:15
To: "Edgar E. Iglesias" <address@hidden>
On 29 May 2018 at 11:50, Edgar E. Iglesias <address@hidden> wrote:
> From: "Edgar E. Iglesias" <address@hidden>
>
> Add a configurable output address mask, used to mimic the
> configurable physical address bit width.
>
> Reviewed-by: Alistair Francis <address@hidden>
> Reviewed-by: Richard Henderson <address@hidden>
> Signed-off-by: Edgar E. Iglesias <address@hidden>
> ---
>  target/microblaze/cpu.c | 1 +
>  target/microblaze/mmu.c | 1 +
>  target/microblaze/mmu.h | 1 +
>  3 files changed, 3 insertions(+)
>
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index 6ee15ac800..71fc8d09fe 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -128,6 +128,7 @@ static void mb_cpu_reset(CPUState *s)
>      env->mmu.c_mmu = 3;
>      env->mmu.c_mmu_tlb_access = 3;
>      env->mmu.c_mmu_zones = 16;
> +    env->mmu.c_addr_mask = MAKE_64BIT_MASK(0, cpu->cfg.addr_size);
>  #endif
>  }
>
> diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
> index a379968618..166c79908c 100644
> --- a/target/microblaze/mmu.c
> +++ b/target/microblaze/mmu.c
> @@ -164,6 +164,7 @@ unsigned int mmu_translate(struct microblaze_mmu *mmu,
>              tlb_rpn = d & TLB_RPN_MASK;
>
>              lu->vaddr = tlb_tag;
> +            lu->paddr = tlb_rpn & mmu->c_addr_mask;
>              lu->paddr = tlb_rpn;
>              lu->size = tlb_size;
>              lu->err = ERR_HIT;

Coverity points out (CID 1391441) that the line added here
has no effect, because we immediately overwrite lu->paddr in
the following line. What was the intention here ?

thanks
-- PMM