Re: [Qemu-devel] [PATCH 0/3] aspeed/smc: small fixes

[Peter Maydell]

On 12 June 2018 at 07:57, Cédric Le Goater <address@hidden> wrote:
> Hello,
>
> Here is a short series of cleanups and fixes for issues in the Aspeed
> SMC controller model discovered when experimenting with the MMIO exec
> feature and also from tests under a QEMU PowerNV machine.
>
> Indeed, the OPAL/skiboot firmware accesses the Aspeed SoC address
> space using the iLPC->AHB bridge of the SuperIO controller and drives
> the SPI controller to access the PNOR.

Is there anybody familiar with the aspeed SoC who'd like to
review? The patches don't look particularly wrong, but I'm
not really in a position to be able to review...

thanks
-- PMM