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[Qemu-devel] [PULL 10/28] hw/arm/virt: Register two redistributor region
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 10/28] hw/arm/virt: Register two redistributor regions when necessary |
Date: |
Fri, 22 Jun 2018 13:56:55 +0100 |
From: Eric Auger <address@hidden>
With a VGICv3 KVM device, if the number of vcpus exceeds the
capacity of the legacy redistributor region (123 redistributors),
we now attempt to register a second redistributor region. Up to
512 redistributors can fit in this latter on top of the 123 allowed
by the legacy redistributor region.
Registering this second redistributor region is possible if the
host kernel supports the following VGICv3 KVM device group/attribute:
KVM_DEV_ARM_VGIC_GRP_ADDR/KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION.
In case the host kernel does not support the registration of several
redistributor regions and the requested number of vcpus exceeds the
capacity of the legacy redistributor region, the GICv3 device
initialization fails with a proper error message and qemu exits.
At the moment the max number of vcpus still is capped by the
virt machine class max_cpus.
Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Andrew Jones <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/virt.c | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index e5e7606946f..9b9bc5091e3 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -529,6 +529,7 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic)
SysBusDevice *gicbusdev;
const char *gictype;
int type = vms->gic_version, i;
+ uint32_t nb_redist_regions = 0;
gictype = (type == 3) ? gicv3_class_name() : gic_class_name();
@@ -548,14 +549,28 @@ static void create_gic(VirtMachineState *vms, qemu_irq
*pic)
vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
uint32_t redist0_count = MIN(smp_cpus, redist0_capacity);
- qdev_prop_set_uint32(gicdev, "len-redist-region-count", 1);
+ nb_redist_regions = virt_gicv3_redist_region_count(vms);
+
+ qdev_prop_set_uint32(gicdev, "len-redist-region-count",
+ nb_redist_regions);
qdev_prop_set_uint32(gicdev, "redist-region-count[0]", redist0_count);
+
+ if (nb_redist_regions == 2) {
+ uint32_t redist1_capacity =
+ vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIST_SIZE;
+
+ qdev_prop_set_uint32(gicdev, "redist-region-count[1]",
+ MIN(smp_cpus - redist0_count, redist1_capacity));
+ }
}
qdev_init_nofail(gicdev);
gicbusdev = SYS_BUS_DEVICE(gicdev);
sysbus_mmio_map(gicbusdev, 0, vms->memmap[VIRT_GIC_DIST].base);
if (type == 3) {
sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base);
+ if (nb_redist_regions == 2) {
+ sysbus_mmio_map(gicbusdev, 2, vms->memmap[VIRT_GIC_REDIST2].base);
+ }
} else {
sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_CPU].base);
}
@@ -1351,6 +1366,7 @@ static void machvirt_init(MachineState *machine)
*/
if (vms->gic_version == 3) {
virt_max_cpus = vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
+ virt_max_cpus += vms->memmap[VIRT_GIC_REDIST2].size /
GICV3_REDIST_SIZE;
} else {
virt_max_cpus = GIC_NCPU;
}
--
2.17.1
- [Qemu-devel] [PULL 00/28] target-arm queue, Peter Maydell, 2018/06/22
- [Qemu-devel] [PULL 10/28] hw/arm/virt: Register two redistributor regions when necessary,
Peter Maydell <=
- [Qemu-devel] [PULL 12/28] hw/arm/virt: Add virt-3.0 machine type, Peter Maydell, 2018/06/22
- [Qemu-devel] [PULL 11/28] hw/arm/virt: Add a new 256MB ECAM region, Peter Maydell, 2018/06/22
- [Qemu-devel] [PULL 13/28] hw/arm/virt: Use 256MB ECAM region by default, Peter Maydell, 2018/06/22
- [Qemu-devel] [PULL 09/28] hw/arm/virt-acpi-build: Advertise one or two GICR structures, Peter Maydell, 2018/06/22
- [Qemu-devel] [PULL 08/28] hw/arm/virt: GICv3 DT node with one or two redistributor regions, Peter Maydell, 2018/06/22
- [Qemu-devel] [PULL 07/28] hw/intc/arm_gicv3_kvm: Get prepared to handle multiple redist regions, Peter Maydell, 2018/06/22
- [Qemu-devel] [PULL 14/28] hw/arm/virt: Increase max_cpus to 512, Peter Maydell, 2018/06/22
- [Qemu-devel] [PULL 04/28] linux-headers: Update to kernel mainline commit b357bf602, Peter Maydell, 2018/06/22
- [Qemu-devel] [PULL 05/28] target/arm: Allow KVM device address overwriting, Peter Maydell, 2018/06/22
- [Qemu-devel] [PULL 18/28] hw/misc/tz-mpc.c: Implement registers, Peter Maydell, 2018/06/22