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Re: [Qemu-devel] [PATCH v4 6/8] target/mips: Amend CP0 WatchHi register
From: |
Aleksandar Markovic |
Subject: |
Re: [Qemu-devel] [PATCH v4 6/8] target/mips: Amend CP0 WatchHi register implementation |
Date: |
Fri, 6 Jul 2018 15:20:13 +0000 |
> > +++ b/target/mips/op_helper.c
> > @@ -893,7 +893,12 @@ target_ulong helper_mfc0_watchlo(CPUMIPSState *env, >
> > uint32_t sel)
> >
> > target_ulong helper_mfc0_watchhi(CPUMIPSState *env, uint32_t sel)
> > {
> > - return env->CP0_WatchHi[sel];
> > + return (int32_t) env->CP0_WatchHi[sel];
> > +}
> > +
> > +target_ulong helper_mfhc0_watchhi(CPUMIPSState *env, uint32_t sel)
> > +{
> > + return env->CP0_WatchHi[sel] >> 32;
> > }
>
> Did you in fact want the high-part sign-extended as well?
> It might be more obvious to write
>
> return sextract64(env->CP0_WatchHi[sel], 32, 32);
>
> in that case.
>
> > +void helper_mthc0_watchhi(CPUMIPSState *env, target_ulong arg1, uint32_t
> > sel)
> > +{
> > + env->CP0_WatchHi[sel] = ((uint64_t) (arg1) << 32) |
> > + (env->CP0_WatchHi[sel] &
> > 0x00000000ffffffffULL);
>
> Cleaner as
>
> env->CP0_WatchHi[sel] = deposit64(env->CP0_WatchHi[sel], 32, 32, arg1);
>
>
> For future cleanup, there is nothing in this (or several other) that requires
> writing helper code. This could just as easily be expanded inline with one
> single load or store operation.
>
>
> r~>
If this all is the case, I am going to remove this patch from this series.
There is no hurry. This patch just needs to be thought over a little bit more.
It will be sent in some future series.
Regards,
Aleksandar
- Re: [Qemu-devel] [PATCH v4 2/8] target/mips: Workaround for checkpatch.pl hanging on msa_helper.c, (continued)
- [Qemu-devel] [PATCH v4 5/8] target/mips: Add CP0 BadInstrX register, Aleksandar Markovic, 2018/07/06
- [Qemu-devel] [PATCH v4 1/8] target/mips: Update maintainer's email addresses, Aleksandar Markovic, 2018/07/06
- [Qemu-devel] [PATCH v4 4/8] target/mips: Avoid case statements formulated by ranges, Aleksandar Markovic, 2018/07/06
- [Qemu-devel] [PATCH v4 3/8] target/mips: Update some CP0 registers bit definitions, Aleksandar Markovic, 2018/07/06
- [Qemu-devel] [PATCH v4 8/8] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0, Aleksandar Markovic, 2018/07/06
- [Qemu-devel] [PATCH v4 7/8] target/mips: Don't update BadVAddr register in Debug Mode, Aleksandar Markovic, 2018/07/06
- [Qemu-devel] [PATCH v4 6/8] target/mips: Amend CP0 WatchHi register implementation, Aleksandar Markovic, 2018/07/06