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Re: [Qemu-devel] [PATCH v6 42/77] target/mips: Add emulation of DSP ASE


From: Aleksandar Markovic
Subject: Re: [Qemu-devel] [PATCH v6 42/77] target/mips: Add emulation of DSP ASE for nanoMIPS - part 5
Date: Fri, 3 Aug 2018 11:55:53 +0000

> From: Stefan Markovic <address@hidden>
> Sent: Thursday, August 2, 2018 4:16 PM
> Subject: [PATCH v6 42/77] target/mips: Add emulation of DSP ASE for nanoMIPS 
> - part 5
> 
> From: Stefan Markovic <address@hidden>
> 
> Add emulation of DSP ASE instructions for nanoMIPS - part 5.
> 
> Signed-off-by: Aleksandar Markovic <address@hidden>
> Signed-off-by: Stefan Markovic <address@hidden>
> ---
>  target/mips/translate.c | 159 
> ++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 159 insertions(+)
> 
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index aa1dff5..2a45302 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -17403,6 +17403,161 @@ static void 
> gen_pool32axf_2_nanomips_insn(DisasContext *ctx, uint32_t opc,
>      tcg_temp_free(v1_t);
>  }
> 
> +    case NM_BITSWAP:
> +        gen_bitswap(ctx, OPC_BITSWAP, ret, rs);
> +        break;
> +    case NM_CLO:
> +        gen_cl(ctx, OPC_CLO, ret, rs);
> +        break;
> +    case NM_CLZ:
> +        gen_cl(ctx, OPC_CLZ, ret, rs);
> +        break;
> +    case NM_WSBH:
> +        gen_bshfl(ctx, OPC_WSBH, ret, rs);
> +        break;

It would have been better if these four non-DSP instructions were in a separate 
patch, situated much earlier in this series, but since the net result is the 
same:

Reviewed-by: Aleksandar Markovic <address@hidden>



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