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Re: [Qemu-devel] [PATCH 5/7] aspeed_sdmc: Handle ECC training
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-devel] [PATCH 5/7] aspeed_sdmc: Handle ECC training |
Date: |
Tue, 7 Aug 2018 12:29:15 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 |
On 08/07/2018 09:57 AM, Joel Stanley wrote:
> This is required to ensure u-boot SDRAM training completes.
>
> Signed-off-by: Joel Stanley <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Thanks,
C.
> ---
> hw/misc/aspeed_sdmc.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
> index 522e01ef8c0d..89de3138aff0 100644
> --- a/hw/misc/aspeed_sdmc.c
> +++ b/hw/misc/aspeed_sdmc.c
> @@ -27,6 +27,10 @@
> #define R_STATUS1 (0x60 / 4)
> #define PHY_BUSY_STATE BIT(0)
>
> +#define R_ECC_TEST_CTRL (0x70 / 4)
> +#define ECC_TEST_FINISHED BIT(12)
> +#define ECC_TEST_FAIL BIT(13)
> +
> /*
> * Configuration register Ox4 (for Aspeed AST2400 SOC)
> *
> @@ -148,6 +152,11 @@ static void aspeed_sdmc_write(void *opaque, hwaddr addr,
> uint64_t data,
> /* Will never return 'busy' */
> data &= ~PHY_BUSY_STATE;
> break;
> + case R_ECC_TEST_CTRL:
> + /* Always done, always happy */
> + data |= ECC_TEST_FINISHED;
> + data &= ~ECC_TEST_FAIL;
> + break;
> default:
> break;
> }
>
- [Qemu-devel] [PATCH 0/7] arm: aspeed: Extend SDRAM controller, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 1/7] aspeed_sdmc: Extend number of valid registers, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 2/7] aspeed_sdmc: Fix saved values, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 3/7] aspeed_sdmc: Set 'cache initial sequence' always true, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 4/7] aspeed_sdmc: Init status alwlays idle, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 5/7] aspeed_sdmc: Handle ECC training, Joel Stanley, 2018/08/07
- Re: [Qemu-devel] [PATCH 5/7] aspeed_sdmc: Handle ECC training,
Cédric Le Goater <=
- [Qemu-devel] [PATCH 6/7] aspeed: add a max_ram_size property to the memory controller, Joel Stanley, 2018/08/07
- [Qemu-devel] [PATCH 7/7] aspeed: Link SCU to the watchdog, Joel Stanley, 2018/08/07
- Re: [Qemu-devel] [PATCH 0/7] arm: aspeed: Extend SDRAM controller, Cédric Le Goater, 2018/08/07