qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] [PULL 01/45] target/arm: Forbid unprivileged mode for M Bas


From: Peter Maydell
Subject: [Qemu-devel] [PULL 01/45] target/arm: Forbid unprivileged mode for M Baseline
Date: Tue, 14 Aug 2018 19:17:31 +0100

From: Julia Suvorova <address@hidden>

MSR handling is the only place where CONTROL.nPRIV is modified.

Signed-off-by: Julia Suvorova <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
 target/arm/helper.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 66afb08ee0f..a6d642f4ae5 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -10728,8 +10728,10 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t 
maskreg, uint32_t val)
             write_v7m_control_spsel_for_secstate(env,
                                                  val & 
R_V7M_CONTROL_SPSEL_MASK,
                                                  M_REG_NS);
-            env->v7m.control[M_REG_NS] &= ~R_V7M_CONTROL_NPRIV_MASK;
-            env->v7m.control[M_REG_NS] |= val & R_V7M_CONTROL_NPRIV_MASK;
+            if (arm_feature(env, ARM_FEATURE_M_MAIN)) {
+                env->v7m.control[M_REG_NS] &= ~R_V7M_CONTROL_NPRIV_MASK;
+                env->v7m.control[M_REG_NS] |= val & R_V7M_CONTROL_NPRIV_MASK;
+            }
             return;
         case 0x98: /* SP_NS */
         {
@@ -10822,8 +10824,10 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t 
maskreg, uint32_t val)
             !arm_v7m_is_handler_mode(env)) {
             write_v7m_control_spsel(env, (val & R_V7M_CONTROL_SPSEL_MASK) != 
0);
         }
-        env->v7m.control[env->v7m.secure] &= ~R_V7M_CONTROL_NPRIV_MASK;
-        env->v7m.control[env->v7m.secure] |= val & R_V7M_CONTROL_NPRIV_MASK;
+        if (arm_feature(env, ARM_FEATURE_M_MAIN)) {
+            env->v7m.control[env->v7m.secure] &= ~R_V7M_CONTROL_NPRIV_MASK;
+            env->v7m.control[env->v7m.secure] |= val & 
R_V7M_CONTROL_NPRIV_MASK;
+        }
         break;
     default:
     bad_reg:
-- 
2.18.0




reply via email to

[Prev in Thread] Current Thread [Next in Thread]