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Re: [Qemu-devel] [PATCH 09/20] target/arm: Handle SVE vector length chan
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 09/20] target/arm: Handle SVE vector length changes in system mode |
Date: |
Fri, 17 Aug 2018 17:22:05 +0100 |
On 9 August 2018 at 05:21, Richard Henderson
<address@hidden> wrote:
> SVE vector length can change when changing EL, or when writing
> to one of the ZCR_ELn registers.
>
> For correctness, our implementation requires that predicate bits
> that are inaccessible are never set. Which means noticing length
> changes and zeroing the appropriate register bits.
>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> +/*
> + * Notice a change in SVE vector size when changing EL.
> + */
> +void aarch64_sve_change_el(CPUARMState *env, int old_el, int new_el)
> +{
> + int old_len, new_len;
> +
> + /* Nothing to do if no SVE. */
> + if (!arm_feature(env, ARM_FEATURE_SVE)) {
> + return;
> + }
> +
> + /* Nothing to do if FP is disabled in either EL. */
> + if (fp_exception_el(env, old_el) || fp_exception_el(env, new_el)) {
> + return;
> + }
> +
> + /*
> + * When FP is enabled, but SVE is disabled, the effective len is 0.
> + * ??? How should sve_exception_el interact with AArch32 state?
> + * That isn't included in the CheckSVEEnabled pseudocode, so is the
> + * host kernel required to explicitly disable SVE for an EL using aa32?
> + */
I'm not clear what you're asking here. If the EL is AArch32
then why does it make a difference if SVE is enabled or disabled?
You can't get at it...
> + old_len = (sve_exception_el(env, old_el)
> + ? 0 : sve_zcr_len_for_el(env, old_el));
> + new_len = (sve_exception_el(env, new_el)
> + ? 0 : sve_zcr_len_for_el(env, new_el));
> +
> + /* When changing vector length, clear inaccessible state. */
> + if (new_len < old_len) {
> + aarch64_sve_narrow_vq(env, new_len + 1);
> + }
> +}
> +#endif
thanks
-- PMM
- Re: [Qemu-devel] [PATCH 06/20] target/arm: Fix arm_current_el for user-only, (continued)
- [Qemu-devel] [PATCH 09/20] target/arm: Handle SVE vector length changes in system mode, Richard Henderson, 2018/08/09
- Re: [Qemu-devel] [PATCH 09/20] target/arm: Handle SVE vector length changes in system mode,
Peter Maydell <=
- [Qemu-devel] [PATCH 10/20] target/arm: Adjust aarch64_cpu_dump_state for system mode SVE, Richard Henderson, 2018/08/09
- [Qemu-devel] [PATCH 11/20] target/arm: Clear unused predicate bits for LD1RQ, Richard Henderson, 2018/08/09
- [Qemu-devel] [PATCH 12/20] target/arm: Rewrite helper_sve_ld1*_r using pages, Richard Henderson, 2018/08/09