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[Qemu-devel] [PULL 35/74] target-i386: fix segment limit check in ljmp
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 35/74] target-i386: fix segment limit check in ljmp |
Date: |
Tue, 21 Aug 2018 19:02:07 +0200 |
From: Andrew Oates <address@hidden>
The current implementation has three bugs,
* segment limits are not enforced in protected mode if the L bit is set
in the target segment descriptor
* segment limits are not enforced in compatibility mode (ljmp to 32-bit
code segment in long mode)
* #GP(new_cs) is generated rather than #GP(0)
Now the segment limits are enforced if we're not in long mode OR the
target code segment doesn't have the L bit set.
Signed-off-by: Andrew Oates <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
target/i386/seg_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/seg_helper.c b/target/i386/seg_helper.c
index b2adddc..d1cbc6e 100644
--- a/target/i386/seg_helper.c
+++ b/target/i386/seg_helper.c
@@ -1633,8 +1633,8 @@ void helper_ljmp_protected(CPUX86State *env, int new_cs,
target_ulong new_eip,
}
limit = get_seg_limit(e1, e2);
if (new_eip > limit &&
- !(env->hflags & HF_LMA_MASK) && !(e2 & DESC_L_MASK)) {
- raise_exception_err_ra(env, EXCP0D_GPF, new_cs & 0xfffc, GETPC());
+ (!(env->hflags & HF_LMA_MASK) || !(e2 & DESC_L_MASK))) {
+ raise_exception_err_ra(env, EXCP0D_GPF, 0, GETPC());
}
cpu_x86_load_seg_cache(env, R_CS, (new_cs & 0xfffc) | cpl,
get_seg_base(e1, e2), limit, e2);
--
1.8.3.1
- [Qemu-devel] [PULL 30/74] i386: Fix arch_query_cpu_model_expansion() leak, (continued)
- [Qemu-devel] [PULL 30/74] i386: Fix arch_query_cpu_model_expansion() leak, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 40/74] test-rcu-list: access goflag with atomics, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 42/74] test-rcu-list: abstract the list implementation, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 55/74] vhost-scsi: unify vhost-scsi get_features implementations, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 53/74] cpus: allow cpu_get_ticks out of BQL, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 50/74] cpus: protect all icount computation with seqlock, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 26/74] hmp-commands-info: add sync-profile, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 56/74] vhost-scsi: expose 't10_pi' property for VIRTIO_SCSI_F_T10_PI, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 54/74] vhost-user-scsi: move host_features into VHostSCSICommon, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 29/74] fw_cfg: import & use linux/qemu_fw_cfg.h, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 35/74] target-i386: fix segment limit check in ljmp,
Paolo Bonzini <=
- [Qemu-devel] [PULL 69/74] target/i386: update MPX flags when CPL changes, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 61/74] pc-dimm: assign and verify the "addr" property during pre_plug, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 70/74] KVM: cleanup unnecessary #ifdef KVM_CAP_..., Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 73/74] char-socket: update all ioc handlers when changing context, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 60/74] pc: drop memory region alignment check for 0, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 71/74] Revert "chardev: tcp: postpone TLS work until machine done", Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 59/74] util/oslib-win32: indicate alignment for qemu_anon_ram_alloc(), Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 58/74] pc-dimm: assign and verify the "slot" property during pre_plug, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 72/74] Revert "chardev: tcp: postpone async connection setup", Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 74/74] test-char: add socket reconnect test, Paolo Bonzini, 2018/08/21