Re: [Qemu-devel] [PATCH v3 0/8] Add limited MXU instruction support

[Janeczek, Craig]

That seems like a good plan to separate these tasks. I will implement this in 
the next patchset. Thank you

-----Original Message-----
From: Aleksandar Markovic <address@hidden> 
Sent: Thursday, August 30, 2018 8:40 AM
To: Janeczek, Craig <address@hidden>; address@hidden
Cc: address@hidden; Petar Jovanovic <address@hidden>; Richard Henderson 
<address@hidden>
Subject: Re: [PATCH v3 0/8] Add limited MXU instruction support

Hi, Craig,

> From: Craig Janeczek <address@hidden>
> Sent: Tuesday, August 28, 2018 3:00 PM
> 
> Subject: [PATCH v3 0/8] Add limited MXU instruction support
> 
> This patch set begins to add MXU instruction support for mips emulation.

Based on the info I have, I think a reasonable approach to integration of this 
series would be:

- Add this line in mips-defs.h

#define   ASE_MXU       0x02000000

- In main switch, use this segment

        if (ctx->insn_flags & ASE_MXU) {
                decode_opc_special2_mxu(env, ctx);
        } else {
                decode_opc_special2_legacy(env, ctx);
        }

That way, you would be able to add MXU code without specifying CPU that 
supports it. This will enable you to focus on MXU, which is a serieoous task 
anyway. Hopefully, a CPU will be added at some later date.

Thanks,
Aleksandar