[Qemu-devel] [PATCH v2 0/9] target/arm: Rely on id regs instead of features

[Richard Henderson]

There are more feature bits that could be converted, but I thought
I should show the work to this point to get feedback.

This is the "v2" as compared to 
http://lists.nongnu.org/archive/html/qemu-devel/2018-09/msg01849.html


r~


Richard Henderson (9):
  target/arm: Define fields of ISAR registers
  target/arm: Convert v8 extensions from feature bits to isar tests
  target/arm: Align cortex-r5 id_isar0
  target/arm: Fix cortex-a7 id_isar0
  target/arm: Convert division from feature bits to isar0 tests
  target/arm: Convert jazelle from feature bit to isar1 test
  target/arm: Convert t32ee from feature bit to isar3 test
  target/arm: Convert sve from feature bit to pfr0 test
  target/arm: Convert v8.2-fp16 from feature bit to pfr0 test

 target/arm/cpu.h            | 260 +++++++++++++++++++++++++++++++++---
 target/arm/translate-a64.h  |  22 +++
 target/arm/translate.h      |  20 +++
 linux-user/aarch64/signal.c |   4 +-
 linux-user/elfload.c        |  60 +++++----
 linux-user/syscall.c        |  10 +-
 target/arm/cpu.c            |  56 ++++----
 target/arm/cpu64.c          |  57 ++++----
 target/arm/helper.c         |  11 +-
 target/arm/machine.c        |   6 +-
 target/arm/translate-a64.c  | 144 ++++++++++----------
 target/arm/translate.c      |  47 +++----
 12 files changed, 486 insertions(+), 211 deletions(-)

-- 
2.17.1