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[Qemu-devel] [PULL 11/15] s390x/tcg: check for AFP-register, BFP and DFP
From: |
Cornelia Huck |
Subject: |
[Qemu-devel] [PULL 11/15] s390x/tcg: check for AFP-register, BFP and DFP data exceptions |
Date: |
Thu, 4 Oct 2018 17:28:53 +0200 |
From: David Hildenbrand <address@hidden>
With the annotated functions, we can now easily check this at a central
place.
DXC 1 is to be injected if an AFP register is used (for a HFP AND FPS
instruction) when AFP is disabled.
DXC 2 is to be injected if a BFP instruction is used when AFP is
disabled.
DXC 3 is to be injected if a DFP instruction is used when AFP is
disabled.
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
---
target/s390x/translate.c | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 49e5e2cc58..67049975fa 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -6094,6 +6094,11 @@ static const DisasInsn *extract_insn(CPUS390XState *env,
DisasContext *s,
return info;
}
+static bool is_afp_reg(int reg)
+{
+ return reg % 2 || reg > 6;
+}
+
static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s)
{
const DisasInsn *insn;
@@ -6120,6 +6125,34 @@ static DisasJumpType translate_one(CPUS390XState *env,
DisasContext *s)
}
#endif
+ /* process flags */
+ if (insn->flags) {
+ /* if AFP is not enabled, instructions and registers are forbidden */
+ if (!(s->base.tb->flags & FLAG_MASK_AFP)) {
+ uint8_t dxc = 0;
+
+ if ((insn->flags & IF_AFP1) && is_afp_reg(get_field(&f, r1))) {
+ dxc = 1;
+ }
+ if ((insn->flags & IF_AFP2) && is_afp_reg(get_field(&f, r2))) {
+ dxc = 1;
+ }
+ if ((insn->flags & IF_AFP3) && is_afp_reg(get_field(&f, r3))) {
+ dxc = 1;
+ }
+ if (insn->flags & IF_BFP) {
+ dxc = 2;
+ }
+ if (insn->flags & IF_DFP) {
+ dxc = 3;
+ }
+ if (dxc) {
+ gen_data_exception(dxc);
+ return DISAS_NORETURN;
+ }
+ }
+ }
+
/* Check for insn specification exceptions. */
if (insn->spec) {
int spec = insn->spec, excp = 0, r;
--
2.14.4
- [Qemu-devel] [PULL 03/15] hw/s390x/ioinst: Fix alignment problem in struct SubchDev, (continued)
- [Qemu-devel] [PULL 03/15] hw/s390x/ioinst: Fix alignment problem in struct SubchDev, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 01/15] hw/s390x/ipl: Fix alignment problems of S390IPLState members, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 05/15] target/s390x: exception on non-aligned LPSW(E), Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 02/15] hw/s390x/css: Remove QEMU_PACKED from struct SenseId, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 04/15] s390x: Fence huge pages prior to 3.1, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 06/15] s390x: move tcg_s390_program_interrupt() into TCG code and mark it noreturn, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 07/15] s390x/tcg: factor out and fix DATA exception injection, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 08/15] s390x/tcg: store in the TB flags if AFP is enabled, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 09/15] s390x/tcg: support flags for instructions, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 10/15] s390x/tcg: add instruction flags for floating point instructions, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 11/15] s390x/tcg: check for AFP-register, BFP and DFP data exceptions,
Cornelia Huck <=
- [Qemu-devel] [PULL 12/15] s390x/tcg: handle privileged instructions via flags, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 14/15] s390x/tcg: refactor specification checking, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 13/15] s390x/tcg: fix FP register pair checks, Cornelia Huck, 2018/10/04
- [Qemu-devel] [PULL 15/15] hw/s390x/s390-pci-bus: Convert sysbus init function to realize function, Cornelia Huck, 2018/10/04
- Re: [Qemu-devel] [PULL 00/15] s390x updates, Peter Maydell, 2018/10/05