Re: [Qemu-devel] [PATCH v5 1/6] target/alpha: remove tlb_flush from alpha_cpu_initfn

[Peter Maydell]

On 9 October 2018 at 19:20, Emilio G. Cota <address@hidden> wrote:
> On Tue, Oct 09, 2018 at 18:55:30 +0100, Peter Maydell wrote:
>>
>> What's the codepath by which tlb_flush gets called on
>> cpu reset? I had a quick look but couldn't find it...
>
> From cpu.c:
>
> static void cpu_common_reset(CPUState *cpu)
> {
>     CPUClass *cc = CPU_GET_CLASS(cpu);
> ...
>     if (tcg_enabled()) {
>         cpu_tb_jmp_cache_clear(cpu);
>
>         tcg_flush_softmmu_tlb(cpu);
>     }
> }
>
> tcg_flush_softmmu_tlb is defined in translate-all.c:
>
> /* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
> void tcg_flush_softmmu_tlb(CPUState *cs)
> {
> #ifdef CONFIG_SOFTMMU
>     tlb_flush(cs);
> #endif
> }

Ah, thank you. I missed this because of the indirection
via tcg_flush_softmmu_tlb().

>> (The other dubious-looking bit of flushing in the
>> target/alpha code is the code that generates calls
>> to tb_flush()... we have very few calls to tb_flush
>> outside the 'core' code and I suspect they could all
>> be avoided.)
>
> If the comment below is accurate, seems fair enough.
> tb_flush is only called from target/alpha through a helper,
> generated by:
>
>         /* PALBR */
>         tcg_gen_st_i64(vb, cpu_env, offsetof(CPUAlphaState, palbr));
>         /* Changing the PAL base register implies un-chaining all of the TBs
>            that ended with a CALL_PAL.  Since the base register usually only
>            changes during boot, flushing everything works well.  */
>         gen_helper_tb_flush(cpu_env);
>         return DISAS_PC_STALE;

Mmm, it works (though would it work if the CPU wasn't the
only one in the system?). I just have a reflexive dislike
of design approaches used by only one thing -- I tend to
like to smooth them out so there's more consistency...

thanks
-- PMM