[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 03/20] target/arm: Use tcg_gen_gvec_dup_i64 for LD[1
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 03/20] target/arm: Use tcg_gen_gvec_dup_i64 for LD[1-4]R |
Date: |
Thu, 11 Oct 2018 13:51:49 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate-a64.c | 28 +++-------------------------
1 file changed, 3 insertions(+), 25 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ac9723c1b9..fff99ca303 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -3217,36 +3217,14 @@ static void disas_ldst_single_struct(DisasContext *s,
uint32_t insn)
for (xs = 0; xs < selem; xs++) {
if (replicate) {
/* Load and replicate to all elements */
- uint64_t mulconst;
TCGv_i64 tcg_tmp = tcg_temp_new_i64();
tcg_gen_qemu_ld_i64(tcg_tmp, tcg_addr,
get_mem_index(s), s->be_data + scale);
- switch (scale) {
- case 0:
- mulconst = 0x0101010101010101ULL;
- break;
- case 1:
- mulconst = 0x0001000100010001ULL;
- break;
- case 2:
- mulconst = 0x0000000100000001ULL;
- break;
- case 3:
- mulconst = 0;
- break;
- default:
- g_assert_not_reached();
- }
- if (mulconst) {
- tcg_gen_muli_i64(tcg_tmp, tcg_tmp, mulconst);
- }
- write_vec_element(s, tcg_tmp, rt, 0, MO_64);
- if (is_q) {
- write_vec_element(s, tcg_tmp, rt, 1, MO_64);
- }
+ tcg_gen_gvec_dup_i64(scale, vec_full_reg_offset(s, rt),
+ (is_q + 1) * 8, vec_full_reg_size(s),
+ tcg_tmp);
tcg_temp_free_i64(tcg_tmp);
- clear_vec_high(s, is_q, rt);
} else {
/* Load/store one element per register */
if (is_load) {
--
2.17.1
- [Qemu-devel] [PATCH 02/20] target/arm: Don't call tcg_clear_temp_count, (continued)
- [Qemu-devel] [PATCH 02/20] target/arm: Don't call tcg_clear_temp_count, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 09/20] target/arm: Use gvec for NEON_3R_VADD_VSUB insns, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 17/20] target/arm: Use gvec for NEON VLD all lanes, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 11/20] target/arm: Use gvec for NEON_3R_VMUL, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 18/20] target/arm: Reorg NEON VLD/VST all elements, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 05/20] target/arm: Mark some arrays const, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 03/20] target/arm: Use tcg_gen_gvec_dup_i64 for LD[1-4]R,
Richard Henderson <=
- [Qemu-devel] [PATCH 13/20] target/arm: Use gvec for VSRA, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 06/20] target/arm: Use gvec for NEON VDUP, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 19/20] target/arm: Promote consecutive memory ops for aa32, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 12/20] target/arm: Use gvec for VSHR, VSHL, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 04/20] target/arm: Promote consecutive memory ops for aa64, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 16/20] target/arm: Use gvec for NEON_3R_VTST_VCEQ, NEON_3R_VCGT, NEON_3R_VCGE, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 15/20] target/arm: Use gvec for NEON_3R_VML, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 08/20] target/arm: Use gvec for NEON_3R_LOGIC insns, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 07/20] target/arm: Use gvec for NEON VMOV, VMVN, VBIC & VORR (immediate), Richard Henderson, 2018/10/11