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Re: [Qemu-devel] [PATCH 06/10] target/arm: Implement HCR.VI and VF
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 06/10] target/arm: Implement HCR.VI and VF |
Date: |
Mon, 15 Oct 2018 08:35:28 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 |
On 10/12/18 7:42 AM, Peter Maydell wrote:
> The HCR_EL2 VI and VF bits are supposed to track whether there is
> a pending virtual IRQ or virtual FIQ. For QEMU we store the
> pending VIRQ/VFIQ status in cs->interrupt_request, so this means:
> * if the register is read we must get these bit values from
> cs->interrupt_request
> * if the register is written then we must write the bit
> values back into cs->interrupt_request
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> target/arm/helper.c | 47 +++++++++++++++++++++++++++++++++++++++++----
> 1 file changed, 43 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- Re: [Qemu-devel] [PATCH 03/10] target/arm: Implement HCR.FB, (continued)
- [Qemu-devel] [PATCH 04/10] target/arm: Implement HCR.DC, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 05/10] target/arm: ISR_EL1 bits track virtual interrupts if IMO/FMO set, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 09/10] target/arm: Get IL bit correct for v7 syndrome values, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 07/10] target/arm: Implement HCR.PTW, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 06/10] target/arm: Implement HCR.VI and VF, Peter Maydell, 2018/10/12
- Re: [Qemu-devel] [PATCH 06/10] target/arm: Implement HCR.VI and VF,
Richard Henderson <=
- [Qemu-devel] [PATCH 08/10] target/arm: New utility function to extract EC from syndrome, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 10/10] target/arm: Report correct syndrome for FP/SIMD traps to Hyp mode, Peter Maydell, 2018/10/12