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Re: [Qemu-devel] [PATCH v6 05/14] target/arm: Reorganize PMCCNTR accesse
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v6 05/14] target/arm: Reorganize PMCCNTR accesses |
Date: |
Mon, 15 Oct 2018 12:50:25 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 |
On 10/10/18 1:37 PM, Aaron Lindsay wrote:
> pmccntr_read and pmccntr_write contained duplicate code that was already
> being handled by pmccntr_sync. Consolidate the duplicated code into two
> functions: pmccntr_op_start and pmccntr_op_finish. Add a companion to
> c15_ccnt in CPUARMState so that we can simultaneously save both the
> architectural register value and the last underlying cycle count - this
> ensures time isn't lost and will also allow us to access the 'old'
> architectural register value in order to detect overflows in later
> patches.
>
> Signed-off-by: Aaron Lindsay <address@hidden>
> ---
> target/arm/cpu.h | 26 ++++++++----
> target/arm/helper.c | 96 +++++++++++++++++++++++---------------------
> target/arm/machine.c | 8 ++--
> 3 files changed, 73 insertions(+), 57 deletions(-)
Ok, looking at this follow-up makes more sense than the previous patch. Would
it make sense to squash these two together?
It also makes sense why you'd need the post_save hook.
r~
[Qemu-devel] [PATCH v6 09/14] target/arm: Add array for supported PMU events, generate PMCEID[01], Aaron Lindsay, 2018/10/10
[Qemu-devel] [PATCH v6 05/14] target/arm: Reorganize PMCCNTR accesses, Aaron Lindsay, 2018/10/10
- Re: [Qemu-devel] [PATCH v6 05/14] target/arm: Reorganize PMCCNTR accesses,
Richard Henderson <=
Re: [Qemu-devel] [PATCH v6 05/14] target/arm: Reorganize PMCCNTR accesses, Aaron Lindsay, 2018/10/15
[Qemu-devel] [PATCH v6 12/14] target/arm: PMU: Set PMCR.N to 4, Aaron Lindsay, 2018/10/10