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Re: [Qemu-devel] [PATCH] i386: clarify that the Q35 machine type impleme
From: |
Paolo Bonzini |
Subject: |
Re: [Qemu-devel] [PATCH] i386: clarify that the Q35 machine type implements a P35 chipset |
Date: |
Fri, 19 Oct 2018 13:58:25 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0 |
On 30/08/2018 12:57, Daniel P. Berrangé wrote:
> The 'q35' machine type implements an Intel Series 3 chipset,
> of which there are several variants:
>
> https://www.intel.com/Assets/PDF/datasheet/316966.pdf
>
> The key difference between the 82P35 MCH ('p35', PCI device ID 0x29c0)
> and 82Q35 GMCH ('q35', PCI device ID 0x29b0) variants is that the latter
> has an integrated graphics adapter. QEMU does not implement integrated
> graphics, so uses the PCI ID for the 82P35 chipset, despite calling the
> machine type 'q35'. Thus we rename the PCI device ID constant to reflect
> reality, to avoid confusing future developers. The new name more closely
> matches what pci.ids reports it to be:
>
> $ grep P35 /usr/share/hwdata/pci.ids | grep 29
> 29c0 82G33/G31/P35/P31 Express DRAM Controller
> 29c1 82G33/G31/P35/P31 Express PCI Express Root Port
> 29c4 82G33/G31/P35/P31 Express MEI Controller
> 29c5 82G33/G31/P35/P31 Express MEI Controller
> 29c6 82G33/G31/P35/P31 Express PT IDER Controller
> 29c7 82G33/G31/P35/P31 Express Serial KT Controller
>
> $ grep Q35 /usr/share/hwdata/pci.ids | grep 29
> 29b0 82Q35 Express DRAM Controller
> 29b1 82Q35 Express PCI Express Root Port
> 29b2 82Q35 Express Integrated Graphics Controller
> 29b3 82Q35 Express Integrated Graphics Controller
> 29b4 82Q35 Express MEI Controller
> 29b5 82Q35 Express MEI Controller
> 29b6 82Q35 Express PT IDER Controller
> 29b7 82Q35 Express Serial KT Controller
>
> Arguably the QEMU machine type should be named 'p35'. At this point in
> time, however, it is not worth the churn for management applications &
> documentation to worry about renaming it.
>
> Signed-off-by: Daniel P. Berrangé <address@hidden>
> ---
> hw/pci-host/q35.c | 10 +++++++++-
> include/hw/pci/pci_ids.h | 2 +-
> 2 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
> index 02f9576588..0a056d6aea 100644
> --- a/hw/pci-host/q35.c
> +++ b/hw/pci-host/q35.c
> @@ -618,7 +618,15 @@ static void mch_class_init(ObjectClass *klass, void
> *data)
> dc->desc = "Host bridge";
> dc->vmsd = &vmstate_mch;
> k->vendor_id = PCI_VENDOR_ID_INTEL;
> - k->device_id = PCI_DEVICE_ID_INTEL_Q35_MCH;
> + /*
> + * The 'q35' machine type implements an Intel Series 3 chipset,
> + * of which there are several variants. The key difference between
> + * the 82P35 MCH ('p35') and 82Q35 GMCH ('q35') variants is that
> + * the latter has an integrated graphics adapter. QEMU does not
> + * implement integrated graphics, so uses the PCI ID for the 82P35
> + * chipset.
> + */
> + k->device_id = PCI_DEVICE_ID_INTEL_P35_MCH;
> k->revision = MCH_HOST_BRIDGE_REVISION_DEFAULT;
> k->class_id = PCI_CLASS_BRIDGE_HOST;
> /*
> diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
> index 63acc722a9..eeb33018ad 100644
> --- a/include/hw/pci/pci_ids.h
> +++ b/include/hw/pci/pci_ids.h
> @@ -255,7 +255,7 @@
> #define PCI_DEVICE_ID_INTEL_82801I_EHCI2 0x293c
> #define PCI_DEVICE_ID_INTEL_82599_SFP_VF 0x10ed
>
> -#define PCI_DEVICE_ID_INTEL_Q35_MCH 0x29c0
> +#define PCI_DEVICE_ID_INTEL_P35_MCH 0x29c0
>
> #define PCI_VENDOR_ID_XEN 0x5853
> #define PCI_DEVICE_ID_XEN_PLATFORM 0x0001
>
Queued, thanks.
Paolo