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Re: [Qemu-devel] [PATCH v7 04/20] target/mips: Add and integrate MXU dec
From: |
Aleksandar Markovic |
Subject: |
Re: [Qemu-devel] [PATCH v7 04/20] target/mips: Add and integrate MXU decoding engine placeholder |
Date: |
Sun, 28 Oct 2018 18:39:42 +0000 |
> Subject: Re: [PATCH v7 04/20] target/mips: Add and integrate MXU decoding
> engine > placeholder
>
> > Is the best way to implement this to include processing of MUL, CLZ,
> > CLO, SDBBP instructions into decode_opc_mxu as their encodings aren't
> > overlaid by MXU instructions considering MIPS SPECIAL2 instruction
> > pool and MXU Instruction Set?
>
> The problem is that we don't have the documentation for Ingenic's base
> instruction set. My understanding is that Craig established necessity of
> including non-MXU MUL into decode_opc_mxu() by experimentation,
> or by looking at Ingenic's toolchain source code.
>
> Note that CLZ, CLO, SDBBP are moved from SPECIAL2 to another
> place in opcode space in MIPS R6.
>
> Craig, can you offer any insight on CLZ, CLO, SDBBP in Ingenic's base
> instruction set? They are in SPECIAL2 opcode space for MIPS pre-R6.
>
> Worse come to worst, I recommend adding "TODO" comment to an
> appropriate place in decode_opc_mxu(), and go forward without handling
> CLZ, CLO, SDBBP - given that all changes in this series are just the first
> phase of implementing MXU support - they won't affect any production
> code at this moment.
>
I think this comment should be added to the decode_opc_mxu(), within patch 11:
/*
* TODO: Investigate necessity of including handling of
* CLZ, CLO, SDBB in this function, as they belong to
* SPECIAL2 opcode space for regular pre-R6 MIPS ISAs.
*/
Thanks,
Aleksandar
[Qemu-devel] [PATCH v7 05/20] target/mips: Add MXU decoding engine, Aleksandar Markovic, 2018/10/24
[Qemu-devel] [PATCH v7 06/20] target/mips: Add bit encoding for MXU accumulate add/sub 1-bit pattern 'aptn1', Aleksandar Markovic, 2018/10/24
[Qemu-devel] [PATCH v7 08/20] target/mips: Add bit encoding for MXU execute add/sub pattern 'eptn2', Aleksandar Markovic, 2018/10/24
[Qemu-devel] [PATCH v7 07/20] target/mips: Add bit encoding for MXU accumulate add/sub 2-bit pattern 'aptn2', Aleksandar Markovic, 2018/10/24
[Qemu-devel] [PATCH v7 09/20] target/mips: Add bit encoding for MXU operand getting pattern 'optn2', Aleksandar Markovic, 2018/10/24