[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v8 09/20] target/mips: Add bit encoding for MXU oper
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v8 09/20] target/mips: Add bit encoding for MXU operand getting pattern 'optn2' |
Date: |
Mon, 29 Oct 2018 12:25:17 +0100 |
From: Craig Janeczek <address@hidden>
Add bit encoding for MXU operand getting pattern 'optn2'.
Reviewed-by: Stefan Markovic <address@hidden>
Signed-off-by: Craig Janeczek <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/translate.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 1935796..2cf0ba5 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -23993,6 +23993,12 @@ static void decode_opc_special(CPUMIPSState *env,
DisasContext *ctx)
#define MXU_EPTN2_SA 2
#define MXU_EPTN2_SS 3
+/* MXU operand getting pattern 'optn2' */
+#define MXU_OPTN2_WW 0
+#define MXU_OPTN2_LW 1
+#define MXU_OPTN2_HW 2
+#define MXU_OPTN2_XW 3
+
/*
*
--
2.7.4
- [Qemu-devel] [PATCH v8 00/20] target/mips: Add limited support for Ingenic's MXU ASE, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 01/20] target/mips: Introduce MXU registers, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 02/20] target/mips: Define a bit for MXU in insn_flags, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 03/20] target/mips: Amend MXU instruction opcodes, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 04/20] target/mips: Add and integrate MXU decoding engine placeholder, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 05/20] target/mips: Add MXU decoding engine, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 06/20] target/mips: Add bit encoding for MXU accumulate add/sub 1-bit pattern 'aptn1', Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 07/20] target/mips: Add bit encoding for MXU accumulate add/sub 2-bit pattern 'aptn2', Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 08/20] target/mips: Add bit encoding for MXU execute add/sub pattern 'eptn2', Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 09/20] target/mips: Add bit encoding for MXU operand getting pattern 'optn2',
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v8 10/20] target/mips: Add bit encoding for MXU operand getting pattern 'optn3', Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 12/20] target/mips: Add emulation of MXU instructions S32I2M and S32M2I, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 13/20] target/mips: Move MUL, S32M2I, S32I2M handling out of main MXU switch, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 15/20] target/mips: Add emulation of MXU instruction D16MUL, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 16/20] target/mips: Add emulation of MXU instruction D16MAC, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 17/20] target/mips: Add emulation of MXU instructions Q8MUL and Q8MULSU, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 14/20] target/mips: Add emulation of MXU instruction S8LDD, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 11/20] target/mips: Add emulation of non-MXU MULL within MXU decoding engine, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 20/20] target/mips: Amend MXU ASE overview note, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PATCH v8 18/20] target/mips: Add emulation of MXU instructions S32LDD and S32LDDR, Aleksandar Markovic, 2018/10/29