[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v3 34/35] target/riscv: Splice remaining compres
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v3 34/35] target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 |
Date: |
Wed, 31 Oct 2018 22:47:03 +0000 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 |
On 10/31/18 1:20 PM, Bastian Koppelmann wrote:
> it splices flwsp_ldsp, fswsp_sdsp, and jal_addiw and makes each of them
> reuse the code generator used for the non compressed insns.
>
> Signed-off-by: Bastian Koppelmann <address@hidden>
> ---
> target/riscv/insn16-32.decode | 7 +++++
> target/riscv/insn16-64.decode | 5 ++++
> target/riscv/insn16.decode | 12 ++------
> target/riscv/insn32.decode | 3 +-
> target/riscv/insn_trans/trans_rvc.inc.c | 40 -------------------------
> 5 files changed, 16 insertions(+), 51 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- Re: [Qemu-devel] [PATCH v3 35/35] target/riscv: Remaining rvc insn reuse 32 bit translators, (continued)
- [Qemu-devel] [PATCH v3 26/35] target/riscv: Remove shift and slt insn manual decoding, Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 30/35] target/riscv: Remove decode_RV32_64G(), Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 32/35] target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns, Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 11/35] target/riscv: Convert RV64A insns to decodetree, Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 19/35] target/riscv: Convert quadrant 2 of RVXC insns to decodetree, Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 34/35] target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64, Bastian Koppelmann, 2018/10/31
- Re: [Qemu-devel] [PATCH v3 34/35] target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64,
Richard Henderson <=
- [Qemu-devel] [PATCH v3 18/35] target/riscv: Convert quadrant 1 of RVXC insns to decodetree, Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 13/35] target/riscv: Convert RV64F insns to decodetree, Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 22/35] target/riscv: Remove manual decoding from gen_load(), Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 14/35] target/riscv: Convert RV32D insns to decodetree, Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 17/35] target/riscv: Convert quadrant 0 of RVXC insns to decodetree, Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 33/35] target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64, Bastian Koppelmann, 2018/10/31
- [Qemu-devel] [PATCH v3 24/35] target/riscv: Move gen_arith_imm() decoding into trans_* functions, Bastian Koppelmann, 2018/10/31