Re: [Qemu-devel] [PATCH 0/5] target/arm: KVM vs ARMISARegisters

[Peter Maydell]

On 1 November 2018 at 17:30, Peter Maydell <address@hidden> wrote:
> On 1 November 2018 at 17:26, Alex Bennée <address@hidden> wrote:
>> I think the problem is the we trip over the assert because:
>>
>>     /* Some features automatically imply others: */
>>     if (arm_feature(env, ARM_FEATURE_V8)) {
>>         if (arm_feature(env, ARM_FEATURE_M)) {
>>             set_feature(env, ARM_FEATURE_V7);
>>         } else {
>>             set_feature(env, ARM_FEATURE_V7VE);
>>         }
>>     }
>>
>> Allows:
>>
>>     if (arm_feature(env, ARM_FEATURE_V7VE)) {
>>         assert(cpu_isar_feature(arm_div, cpu));
>>
>> Which isn't strictly true on kvm guests.
>
> KVM guests should definitely all be v7VE and all have
> the arm divide instruction, if they implement AArch32 at all.
> I think what we're hitting here is the case where the host
> CPU has no AArch32 support. In that case the ID_ISAR0_EL1
> sysreg (which we read from KVM and use to populate the
> cpu->isar struct) has an UNKNOWN value.

So I think the assert should probably be
"assert that if this cpu has any EL that can execute at
AArch32 then it has the arm_div ISAR feature". You can
determine the former by looking at ID_AA64PFR0_EL1 field
EL0 (bits [3:0]), which will be >= 0b0010 if AArch32 is
supported at any EL.

thanks
-- PMM