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Re: [Qemu-devel] [PULL v3 00/10] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL v3 00/10] target-arm queue |
Date: |
Fri, 2 Nov 2018 18:22:09 +0000 |
On 2 November 2018 at 17:16, Peter Maydell <address@hidden> wrote:
> This is a respin of my pull request from earlier this week:
> * versal board compile failure fixed
> * a few new patches:
> - MAINTAINERS file fix
> - use ARRAY_SIZE macro in xilinx_zynq
> - avoid an array overrun in strongarm GPIO irq handling
> - fix an assert running KVM on an aarch64-only host
>
> The following changes since commit 69e2d03843412b9c076515b3aa9a71db161b6a1a:
>
> Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf1'
> into staging (2018-11-02 13:16:13 +0000)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20181102
>
> for you to fetch changes up to 6f16da53ffe4567c0353f85055df04860eb4e6fc:
>
> hw/arm: versal: Add a virtual Xilinx Versal board (2018-11-02 14:11:31
> +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * microbit: Add the UART to our nRF51 SoC model
> * Add a virtual Xilinx Versal board "xlnx-versal-virt"
> * hw/arm/virt: Set VIRT_COMPAT_3_0 compat
> * MAINTAINERS: Remove bouncing email in ARM ACPI
> * strongarm: mask off high[31:28] bits from dir and state registers
> * target/arm: Conditionalize some asserts on aarch32 support
> * hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro
>
> ----------------------------------------------------------------
Applied, thanks.
-- PMM
- [Qemu-devel] [PULL 10/10] hw/arm: versal: Add a virtual Xilinx Versal board, (continued)
- [Qemu-devel] [PULL 10/10] hw/arm: versal: Add a virtual Xilinx Versal board, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 08/10] target/arm: Conditionalize some asserts on aarch32 support, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 09/10] hw/arm: versal: Add a model of Xilinx Versal SoC, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 07/10] hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 06/10] strongarm: mask off high[31:28] bits from dir and state registers, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 05/10] MAINTAINERS: Remove bouncing email in ARM ACPI, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 04/10] tests/boot-serial-test: Add microbit board testcase, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 03/10] hw/arm/nrf51_soc: Connect UART to nRF51 SoC, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 01/10] hw/arm/virt: Set VIRT_COMPAT_3_0 compat, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 02/10] hw/char: Implement nRF51 SoC UART, Peter Maydell, 2018/11/02
- Re: [Qemu-devel] [PULL v3 00/10] target-arm queue,
Peter Maydell <=