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Re: [Qemu-devel] [PATCH v2 12/12] disas/mips: Disassemble R5900 DIV[U]1,


From: Aleksandar Markovic
Subject: Re: [Qemu-devel] [PATCH v2 12/12] disas/mips: Disassemble R5900 DIV[U]1, M{F, T}{LO, HI}1 and MULT[U]1
Date: Mon, 5 Nov 2018 15:04:40 +0000

> From: Fredrik Noring <address@hidden>
>
> Subject: [PATCH v2 12/12] disas/mips: Disassemble R5900 DIV[U]1, 
> M{F,T}{LO,HI}1 and MULT[U]1
>
> Disassemble the R5900 instructions DIV1, DIVU1, MFLO1, MTLO1, MFHI1,
> MTHI1, MULT1 and MULTU1. The opcodes for MADD1 and MADDU1 clash with
> the opcodes for CLZ and CLO, resulting in incorrect disassembly. They
> are therefore omitted here.
> 
> Signed-off-by: Fredrik Noring <address@hidden>
> ---

Hi, Fredrik,

I am glad that you want to include QEMU disas support for R5900 - this area 
usually gets forgotten.

But, as you can see, this MIPS feature is partially broken - it doesn't handle 
well overlapping opcodes, and the field "membership" is not taken into account 
at all. I think the feature should be fixed first, and then R5900 support 
added. In fact, the disassembler support in QEMU is almost independent on the 
emulation support (for the corresponding instructions) - so, we could add 
disassembler support for all R5900 instructions in one clean sweep, instead 
dividing that in "million" pieces.

The key to the successful solution would be detecting what CPU is currently 
being emulated, and making disassembling decision based on that.

Let's talk about that later.

Sincerely,
Aleksandar

P.S. Sorry for misspelling your name on several occasions.




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