Re: [Qemu-devel] [PATCH v2 4/6] target/mips: Fix decoding mechanism of special R5900 opcodes

[Aleksandar Markovic]

> From: Fredrik Noring <address@hidden>
> Subject: Re: [PATCH v2 4/6] target/mips: Fix decoding mechanism of special 
> R5900 opcodes
> 
> Hi Aleksandar,
> 
> > Fredrik, do you know by any chance if a document exists that would justify
> > inclusion of non-R5900 DMULT, DMULTU, DDIV, DDIVU in R5900 executables by
> > gcc for R5900? Is it included by cross-gcc or by native gcc, or by both?
> >
> > I think gcc folks must have had a good reason for that, some kind of
> > design - it can't be 'I really like/miss this instruction, let's include
> > it...'
> 
> The R5900 reports itself as MIPS III ...

This is very unclear. What do you mean by this? How does R5900 do that? I can't 
find any trace of such intentions in R5900 docs.

> ... and DMULT, DMULTU, DDIV and DDIVU
> are part of the MIPS III ISA. They are emulated in user mode to support
> generic MIPS III programs.

Pure MIPS III executables should not be a concern of the R5900 emulation, but 
R5900 executables.

Could you please provide a document that would justify inclusion of these 
non-R5900 instruction in an R5900 emulation?

Thanks,
Aleksandar