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Re: [Qemu-devel] [PATCH v3 2/5] target/arm: Fill in ARMISARegisters for
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v3 2/5] target/arm: Fill in ARMISARegisters for kvm64 |
Date: |
Mon, 12 Nov 2018 17:00:20 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 |
On 11/12/18 3:34 PM, Peter Maydell wrote:
>> The other id_aa64* register fields are all extensions to v8.0, so they should
>> be zero. I am of course assuming that AdvSIMD is present, otherwise qemu
>> itself probably have failed before now.
>
> You don't set the id_isar* to say "AdvSIMD present" (or "VFP present"),
> though.
Those two are almost unique in that they are signed fields. So 0 indicates
present and -1 indicates not present (and 1 indicates fp16 support).
r~
[Qemu-devel] [PATCH v3 1/5] target/arm: Install ARMISARegisters from kvm host, Richard Henderson, 2018/11/08
[Qemu-devel] [PATCH v3 3/5] target/arm: Introduce read_sys_reg32 for kvm32, Richard Henderson, 2018/11/08
[Qemu-devel] [PATCH v3 4/5] target/arm: Fill in ARMISARegisters for kvm32, Richard Henderson, 2018/11/08
[Qemu-devel] [PATCH v3 5/5] target/arm: Convert t32ee from feature bit to isar3 test, Richard Henderson, 2018/11/08