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[Qemu-devel] Arm CMP instruction not setting CPSR values as expected


From: Darrell Leinwand
Subject: [Qemu-devel] Arm CMP instruction not setting CPSR values as expected
Date: Thu, 15 Nov 2018 17:32:30 +0000

I have a compare instruction that seems to be returning a not equal, but when 
evaluating the register values they should in fact be equal.  Attached is the 
log of the in_asm and the op logs with the cpu registers turned as well.

I would have expected the Z flag in the CPSR to be set but it doesn’t seem to 
be updating after the CMP instruction. So the bne.n instruction branches when 
it should not.

I am using version 2.12.0 using qemu-system-aarch64 in 32-bit mode. Any 
suggestion would be greatly appreciated.

Thanks,
Darrell

IN:
0x0001c8ee:  429a       cmp      r2, r3
0x0001c8f0:  d10c       bne      #0x1c90c

OP:
ld_i32 tmp5,env,$0xffffffffffffffdc
movi_i32 tmp6,$0x0
brcond_i32 tmp5,tmp6,lt,$L0

---- 000000000001c8ee 0000000000000000 0000000000000000
mov_i32 tmp5,r2
mov_i32 tmp6,r3
sub_i32 NF,tmp5,tmp6
mov_i32 ZF,NF
setcond_i32 CF,tmp5,tmp6,geu
xor_i32 VF,NF,tmp5
xor_i32 tmp7,tmp5,tmp6
and_i32 VF,VF,tmp7
mov_i32 tmp5,NF

---- 000000000001c8f0 0000000000000000 0000000000000000
movi_i32 pc,$0x1c8f0
movi_i32 tmp5,$0x10002
call exception_internal,$0x0,$0,env,tmp5
set_label $L0
exit_tb $0x7fb433c62043

----------------
IN:
0x0001c8f0:  d10c       bne      #0x1c90c

OP:
ld_i32 tmp5,env,$0xffffffffffffffdc
movi_i32 tmp6,$0x0
brcond_i32 tmp5,tmp6,lt,$L0

---- 000000000001c8f0 0000000000000000 0000000000000000
movi_i32 tmp5,$0x0
brcond_i32 ZF,tmp5,eq,$L1
goto_tb $0x0
movi_i32 pc,$0x1c90c
exit_tb $0x7fb433c62040
set_label $L1
goto_tb $0x1
movi_i32 pc,$0x1c8f2
exit_tb $0x7fb433c62041
set_label $L0
exit_tb $0x7fb433c62043

----------------
IN:
0x0001c90c:  2303       movs     r3, #3

OP:
ld_i32 tmp5,env,$0xffffffffffffffdc
movi_i32 tmp6,$0x0
brcond_i32 tmp5,tmp6,lt,$L0

---- 000000000001c90c 0000000000000000 0000000000000000
movi_i32 pc,$0x1c90c
movi_i32 tmp5,$0x10002
call exception_internal,$0x0,$0,env,tmp5
set_label $L0
exit_tb $0x7fb433c62183

R00=01801033 R01=90000000 R02=600d10ad R03=600d10ad
R04=00000008 R05=00000080 R06=2f2f2eff R07=00087f90
R08=01010101 R09=22222222 R10=00000002 R11=00000020
R12=fffdf910 R13=00087f90 R14=0001b4b1 R15=0001c8ee
PSR=00000033 ---- T NS svc32
R00=01801033 R01=90000000 R02=600d10ad R03=600d10ad
R04=00000008 R05=00000080 R06=2f2f2eff R07=00087f90
R08=01010101 R09=22222222 R10=00000002 R11=00000020
R12=fffdf910 R13=00087f90 R14=0001b4b1 R15=0001c8f0
PSR=00000033 ---- T NS svc32
R00=01801033 R01=90000000 R02=600d10ad R03=600d10ad
R04=00000008 R05=00000080 R06=2f2f2eff R07=00087f90
R08=01010101 R09=22222222 R10=00000002 R11=00000020
R12=fffdf910 R13=00087f90 R14=0001b4b1 R15=0001c90c
PSR=00000033 ---- T NS svc32

Darrell Leinwand | Engineering
Performance Software: Seeing Things 
Differently<applewebdata://CF96BF6A-E235-438A-A98E-A4D35FE11B7C/psware.com>.


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