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[Qemu-devel] [PATCH v1 1/1] tcg: mips: Improve the add2/sub2 command to
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [PATCH v1 1/1] tcg: mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS |
Date: |
Wed, 12 Dec 2018 20:58:11 +0000 |
Instead of hard coding 31 for the shift right use
TCG_TARGET_REG_BITS - 1.
Signed-off-by: Alistair Francis <address@hidden>
---
tcg/mips/tcg-target.inc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index cff525373b..aa7cdabf23 100644
--- a/tcg/mips/tcg-target.inc.c
+++ b/tcg/mips/tcg-target.inc.c
@@ -796,7 +796,7 @@ static void tcg_out_addsub2(TCGContext *s, TCGReg rl,
TCGReg rh, TCGReg al,
tcg_out_opc_imm(s, OPC_ADDIU, rl, al, bl);
tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl);
} else if (rl == al && rl == bl) {
- tcg_out_opc_sa(s, OPC_SRL, TCG_TMP0, al, 31);
+ tcg_out_opc_sa(s, OPC_SRL, TCG_TMP0, al, TCG_TARGET_REG_BITS - 1);
tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl);
} else {
tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl);
--
2.19.1
- [Qemu-devel] [PATCH v1 1/1] tcg: mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS,
Alistair Francis <=