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[Qemu-devel] [PATCH v9 6/7] spapr: change default CPU type to POWER9
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [PATCH v9 6/7] spapr: change default CPU type to POWER9 |
Date: |
Mon, 17 Dec 2018 23:34:44 +0100 |
Signed-off-by: Cédric Le Goater <address@hidden>
---
hw/ppc/spapr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index aefa0f4ea430..8ea680fcde1e 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3967,7 +3967,7 @@ static void spapr_machine_class_init(ObjectClass *oc,
void *data)
smc->dr_lmb_enabled = true;
smc->update_dt_enabled = true;
- mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
mc->has_hotpluggable_cpus = true;
smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED;
fwc->get_dev_path = spapr_get_fw_dev_path;
@@ -4066,6 +4066,7 @@ static void spapr_machine_3_1_class_options(MachineClass
*mc)
spapr_machine_4_0_class_options(mc);
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_3_1);
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
smc->update_dt_enabled = false;
}
--
2.17.2
- [Qemu-devel] [PATCH v9 2/7] target/ppc: replace __builtin_ffssl() by the equivalent ctz routines, (continued)
- [Qemu-devel] [PATCH v9 1/7] target/ppc: fix the PPC_BIT definitions, Cédric Le Goater, 2018/12/17
- [Qemu-devel] [PATCH v9 3/7] spapr/xive: fix compilation breakage on windows, Cédric Le Goater, 2018/12/17
- [Qemu-devel] [PATCH v9 4/7] spapr: add an extra OV5 field to the sPAPR IRQ backend, Cédric Le Goater, 2018/12/17
- [Qemu-devel] [PATCH v9 5/7] spapr: introduce an 'ic-mode' machine option, Cédric Le Goater, 2018/12/17
- [Qemu-devel] [PATCH v9 6/7] spapr: change default CPU type to POWER9,
Cédric Le Goater <=
- [Qemu-devel] [PATCH v9 7/7] MAINTAINERS: PPC: add a XIVE section, Cédric Le Goater, 2018/12/17
- Re: [Qemu-devel] [PATCH v9 0/7] ppc: support for the XIVE interrupt controller (POWER9), David Gibson, 2018/12/17