[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 10/34] target/arm: Use vector minmax expanders for a
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 10/34] target/arm: Use vector minmax expanders for aarch32 |
Date: |
Mon, 17 Dec 2018 22:38:47 -0800 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 25 +++++++++++++++++++------
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 33b1860148..f3f172f384 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -6368,6 +6368,25 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
tcg_gen_gvec_cmp(u ? TCG_COND_GEU : TCG_COND_GE, size,
rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size);
return 0;
+
+ case NEON_3R_VMAX:
+ if (u) {
+ tcg_gen_gvec_umax(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+ } else {
+ tcg_gen_gvec_smax(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+ }
+ return 0;
+ case NEON_3R_VMIN:
+ if (u) {
+ tcg_gen_gvec_umin(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+ } else {
+ tcg_gen_gvec_smin(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+ }
+ return 0;
}
if (size == 3) {
@@ -6533,12 +6552,6 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
case NEON_3R_VQRSHL:
GEN_NEON_INTEGER_OP_ENV(qrshl);
break;
- case NEON_3R_VMAX:
- GEN_NEON_INTEGER_OP(max);
- break;
- case NEON_3R_VMIN:
- GEN_NEON_INTEGER_OP(min);
- break;
case NEON_3R_VABD:
GEN_NEON_INTEGER_OP(abd);
break;
--
2.17.2
- [Qemu-devel] [PATCH 17/34] target/ppc: convert VMX logical instructions to use vector operations, (continued)
- [Qemu-devel] [PATCH 17/34] target/ppc: convert VMX logical instructions to use vector operations, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 28/34] target/ppc: Remove vscr_nj and vscr_sat, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 06/34] tcg/i386: Implement vector saturating arithmetic, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 26/34] target/ppc: Pass integer to helper_mtvscr, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 12/34] target/ppc: introduce get_avr64() and set_avr64() helpers for VMX register access, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 05/34] tcg: Add opcodes for vector saturated arithmetic, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 10/34] target/arm: Use vector minmax expanders for aarch32,
Richard Henderson <=
- [Qemu-devel] [PATCH 21/34] target/ppc: nand, nor, eqv are now generic vector operations, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 31/34] target/ppc: Add set_vscr_sat, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 22/34] target/ppc: convert VSX logical operations to vector operations, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 30/34] target/ppc: Use mtvscr/mfvscr for vmstate, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 18/34] target/ppc: convert vaddu[b, h, w, d] and vsubu[b, h, w, d] over to use vector operations, Richard Henderson, 2018/12/18