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[Qemu-devel] [PATCH v2 00/12] target/arm: Implement ARMv8.5-BTI

From: Richard Henderson
Subject: [Qemu-devel] [PATCH v2 00/12] target/arm: Implement ARMv8.5-BTI
Date: Mon, 28 Jan 2019 14:31:06 -0800

The branch target identification extension does not yet have
kernel or gcc support.  It should be in shape for developing
those though.

In system mode I do honor the GP bit from the page tables.
In user-only mode, there is a way to pretend that the GP bit
is always set.  Further linux-user changes will have to track
the ABI that gets developed.

In the meantime, provide a statically linable make check-tcg 
test for the functionality.

Changes since v2:
  * Rebase on master.
  * Incorporate feedback from Peter.


Richard Henderson (12):
  target/arm: Introduce isar_feature_aa64_bti
  target/arm: Add PSTATE.BTYPE
  target/arm: Add BT and BTYPE to tb->flags
  exec: Add target-specific tlb bits to MemTxAttrs
  target/arm: Cache the GP bit for a page in MemTxAttrs
  target/arm: Default handling of BTYPE during translation
  target/arm: Reset btype for direct branches
  target/arm: Set btype for indirect branches
  target/arm: Add x-guarded-pages cpu property for user-only
  target/arm: Enable BTI for -cpu max
  linux-user/aarch64: Reset btype for syscalls and signals
  tests/tcg/aarch64: Add bti smoke test

 include/exec/memattrs.h           |  10 ++
 target/arm/cpu.h                  |  24 +++-
 target/arm/internals.h            |   6 +
 target/arm/translate.h            |   9 ++
 linux-user/aarch64/cpu_loop.c     |  15 +++
 target/arm/cpu64.c                |  22 ++++
 target/arm/helper.c               |  28 +++--
 target/arm/translate-a64.c        | 193 +++++++++++++++++++++++++++++-
 tests/tcg/aarch64/bti-1.c         |  61 ++++++++++
 tests/tcg/aarch64/bti-crt.inc.c   |  51 ++++++++
 tests/tcg/aarch64/Makefile.target |   7 +-
 11 files changed, 415 insertions(+), 11 deletions(-)
 create mode 100644 tests/tcg/aarch64/bti-1.c
 create mode 100644 tests/tcg/aarch64/bti-crt.inc.c


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