Re: [Qemu-devel] [PATCH v4 0/3] arm: microbit Non-Volatile Memory Controller

[Peter Maydell]

On Fri, 1 Feb 2019 at 02:34, Stefan Hajnoczi <address@hidden> wrote:
>
> v4:
>  * assert(offset + size <= s->flash_size) [Peter]
> v3:
>  * Fix endianness of s->storage[], tested by Joel Stanley <address@hidden> on
>    big-endian ppc [Peter]
>  * Fix off-by-one that prevented clearing the last page of flash
>  * Add missing memory_region_flush_rom_device() call to flash_write()
> v2:
>  * Add Patch 2 to call memory_region_flush_rom_device() from pflash devices
>    [Peter]
>
> This series adds the Non-Volatile Memory Controller, which controls access to
> the User Information Control Registers (UICR), Factory Information Control
> Registers (FICR), and flash memory.
>
> This is the last piece of microbit work needed to make basic programs like
> Micropython "Hello world" work under QEMU.
>
> Originally sent as part of Steffen's longer microbit device emulation series, 
> I
> extracted this and deferred it until later because cleanups were necessary:
>
>  * Use memory_region_flush_rom_device() to dirty/invalidate memory [Peter]
>    ^--- Paolo: I CCed you on this new memory API
>  * Fix device-introspect-test segfault due to missing owner when initializing
>    FICR and UICR memory regions [Peter]
>  * Fix off-by-one assertion checks [Peter]
>  * Fix missing whitespace at end of comment [Peter]
>  * Clear UICR on reset - we'd need a block device for true non-volatility
>    [Peter]
>
> Steffen Görtz (3):
>   hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories
>   arm: Instantiate NRF51 special NVM's and NVMC
>   tests/microbit-test: Add tests for nRF51 NVMC



Applied to target-arm.next, thanks.

-- PMM