Re: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
286c4c9db5 target/riscv: Remaining rvc insn reuse 32 bit translators
7f0b9c834a target/riscv: Splice remaining compressed insn pairs for riscv32 vs 
riscv64
62ceaba961 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
5bdfb9a276 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
e33fc78d3c target/riscv: Convert @cs_2 insns to share translation functions
64f5ee6371 target/riscv: Remove decode_RV32_64G()
5d14d7839a target/riscv: Remove gen_system()
d95874a514 target/riscv: Rename trans_arith to gen_arith
c73e893d50 target/riscv: Remove manual decoding of RV32/64M insn
e94f276952 target/riscv: Remove shift and slt insn manual decoding
9a25e29bee target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
3462307e00 target/riscv: Move gen_arith_imm() decoding into trans_* functions
0a7f24e329 target/riscv: Remove manual decoding from gen_store()
dbaf88f810 target/riscv: Remove manual decoding from gen_load()
5b7707c586 target/riscv: Remove manual decoding from gen_branch()
278e17e313 target/riscv: Remove gen_jalr()
c19ca2ef2c target/riscv: Convert quadrant 2 of RVXC insns to decodetree
41049ff073 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
ff9416425a target/riscv: Convert quadrant 0 of RVXC insns to decodetree
5fcca52ad1 target/riscv: Convert RV priv insns to decodetree
c9ee049a87 target/riscv: Convert RV64D insns to decodetree
4a11745327 target/riscv: Convert RV32D insns to decodetree
c0bcb1721a target/riscv: Convert RV64F insns to decodetree
9b908114f9 target/riscv: Convert RV32F insns to decodetree
47c845fbf6 target/riscv: Convert RV64A insns to decodetree
ff33e22cc2 target/riscv: Convert RV32A insns to decodetree
f6b9a9237a target/riscv: Convert RVXM insns to decodetree
88e8b26c24 target/riscv: Convert RVXI csr insns to decodetree
898516b2da target/riscv: Convert RVXI fence insns to decodetree
577ad28fa2 target/riscv: Convert RVXI arithmetic insns to decodetree
53641e2485 target/riscv: Convert RV64I load/store insns to decodetree
3d7f44fb4e target/riscv: Convert RV32I load/store insns to decodetree
0b29012e69 target/riscv: Convert RVXI branch insns to decodetree
69e189ce25 target/riscv: Activate decodetree and implemnt LUI & AUIPC
d61ed337ed target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit d61ed337edca (target/riscv: Move CPURISCVState pointer to 
DisasContext)
2/35 Checking commit 69e189ce252c (target/riscv: Activate decodetree and 
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit 0b29012e69ee (target/riscv: Convert RVXI branch insns to 
decodetree)
4/35 Checking commit 3d7f44fb4e2e (target/riscv: Convert RV32I load/store insns 
to decodetree)
5/35 Checking commit 53641e24852f (target/riscv: Convert RV64I load/store insns 
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 577ad28fa224 (target/riscv: Convert RVXI arithmetic insns 
to decodetree)
7/35 Checking commit 898516b2da81 (target/riscv: Convert RVXI fence insns to 
decodetree)
8/35 Checking commit 88e8b26c24cf (target/riscv: Convert RVXI csr insns to 
decodetree)
9/35 Checking commit f6b9a9237a5d (target/riscv: Convert RVXM insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit ff33e22cc271 (target/riscv: Convert RV32A insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 47c845fbf6ea (target/riscv: Convert RV64A insns to 
decodetree)
12/35 Checking commit 9b908114f998 (target/riscv: Convert RV32F insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit c0bcb1721ae3 (target/riscv: Convert RV64F insns to 
decodetree)
14/35 Checking commit 4a1174532733 (target/riscv: Convert RV32D insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit c9ee049a8734 (target/riscv: Convert RV64D insns to 
decodetree)
16/35 Checking commit 5fcca52ad1d0 (target/riscv: Convert RV priv insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit ff9416425a31 (target/riscv: Convert quadrant 0 of RVXC 
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 41049ff073ce (target/riscv: Convert quadrant 1 of RVXC 
insns to decodetree)
19/35 Checking commit c19ca2ef2c82 (target/riscv: Convert quadrant 2 of RVXC 
insns to decodetree)
20/35 Checking commit 278e17e313c1 (target/riscv: Remove gen_jalr())
21/35 Checking commit 5b7707c586cd (target/riscv: Remove manual decoding from 
gen_branch())
22/35 Checking commit dbaf88f810a1 (target/riscv: Remove manual decoding from 
gen_load())
23/35 Checking commit 0a7f24e329b7 (target/riscv: Remove manual decoding from 
gen_store())
24/35 Checking commit 3462307e0056 (target/riscv: Move gen_arith_imm() decoding 
into trans_* functions)
25/35 Checking commit 9a25e29beee6 (target/riscv: make ADD/SUB/OR/XOR/AND insn 
use arg lists)
26/35 Checking commit e94f2769525e (target/riscv: Remove shift and slt insn 
manual decoding)
27/35 Checking commit c73e893d503c (target/riscv: Remove manual decoding of 
RV32/64M insn)
28/35 Checking commit d95874a514b7 (target/riscv: Rename trans_arith to 
gen_arith)
29/35 Checking commit 5d14d7839a39 (target/riscv: Remove gen_system())
30/35 Checking commit 64f5ee6371d8 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit e33fc78d3c6d (target/riscv: Convert @cs_2 insns to share 
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 5bdfb9a27697 (target/riscv: Convert @cl_d, @cl_w, @cs_d, 
@cs_w insns)
33/35 Checking commit 62ceaba9616a (target/riscv: Splice fsw_sd and flw_ld for 
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 7f0b9c834a1d (target/riscv: Splice remaining compressed 
insn pairs for riscv32 vs riscv64)
35/35 Checking commit 286c4c9db5a8 (target/riscv: Remaining rvc insn reuse 32 
bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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