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Re: [Qemu-devel] [PATCH 09/14] hw/arm/armsse: Allow boards to specify in


From: Philippe Mathieu-Daudé
Subject: Re: [Qemu-devel] [PATCH 09/14] hw/arm/armsse: Allow boards to specify init-svtor
Date: Mon, 18 Feb 2019 23:01:41 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.0

On 2/14/19 1:51 PM, Peter Maydell wrote:
> The Musca boards have DAPLink firmware that sets the initial
> secure VTOR value (the location of the vector table) differently
> depending on the boot mode (from flash, from RAM, etc). Export
> the init-svtor as a QOM property of the ARMSSE object so that
> the board can change it.
> 
> Signed-off-by: Peter Maydell <address@hidden>

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>

> ---
>  include/hw/arm/armsse.h | 3 +++
>  hw/arm/armsse.c         | 8 ++++----
>  2 files changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
> index 444605b44dc..84879f40dd8 100644
> --- a/include/hw/arm/armsse.h
> +++ b/include/hw/arm/armsse.h
> @@ -48,6 +48,8 @@
>   *    if necessary.)
>   *  + QOM property "SRAM_ADDR_WIDTH" sets the number of bits used for the
>   *    address of each SRAM bank (and thus the total amount of internal SRAM)
> + *  + QOM property "init-svtor" sets the initial value of the CPU SVTOR 
> register
> + *    (where it expects to load the PC and SP from the vector table on reset)
>   *  + Named GPIO inputs "EXP_IRQ" 0..n are the expansion interrupts for CPU 
> 0,
>   *    which are wired to its NVIC lines 32 .. n+32
>   *  + Named GPIO inputs "EXP_CPU1_IRQ" 0..n are the expansion interrupts for
> @@ -204,6 +206,7 @@ typedef struct ARMSSE {
>      uint32_t exp_numirq;
>      uint32_t mainclk_frq;
>      uint32_t sram_addr_width;
> +    uint32_t init_svtor;
>  } ARMSSE;
>  
>  typedef struct ARMSSEInfo ARMSSEInfo;
> diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
> index 9a8c49547db..3040ea9324e 100644
> --- a/hw/arm/armsse.c
> +++ b/hw/arm/armsse.c
> @@ -505,11 +505,10 @@ static void armsse_realize(DeviceState *dev, Error 
> **errp)
>           * the INITSVTOR* registers before powering up the CPUs in any case,
>           * so the hardware's default value doesn't matter. QEMU doesn't 
> emulate
>           * the control processor, so instead we behave in the way that the
> -         * firmware does. All boards currently known about have firmware that
> -         * sets the INITSVTOR0 and INITSVTOR1 registers to 0x10000000, like 
> the
> -         * IoTKit default. We can make this more configurable if necessary.
> +         * firmware does. The initial value is configurable by the board code
> +         * to match whatever its firmware does.
>           */
> -        qdev_prop_set_uint32(cpudev, "init-svtor", 0x10000000);
> +        qdev_prop_set_uint32(cpudev, "init-svtor", s->init_svtor);
>          /*
>           * Start all CPUs except CPU0 powered down. In real hardware it is
>           * a configurable property of the SSE-200 which CPUs start powered up
> @@ -1185,6 +1184,7 @@ static Property armsse_properties[] = {
>      DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
>      DEFINE_PROP_UINT32("MAINCLK", ARMSSE, mainclk_frq, 0),
>      DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15),
> +    DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000),
>      DEFINE_PROP_END_OF_LIST()
>  };
>  
> 



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